Freescale Semiconductor MPC5200B ユーザーズマニュアル
FEC Tx FIFO Status Register—MBAR + 0x31A8
MPC5200B Users Guide, Rev. 1
Freescale Semiconductor
14-31
14.8.3
FEC Rx FIFO Last Write Frame Pointer Register—MBAR + 0x3194
FEC Tx FIFO Last Write Frame Pointer Register—MBAR + 0x31B4
The RFIFO_LWF_PTR and TFIFO_LWF_PTR are a FIFO maintained pointer which indicates the location of the start of the last frame written
into the FIFO. The LWFP updates on FIFO write data accesses which create a frame boundary, whether that be by setting the WFC control
bit or by feeding a frame bit in on the appropriate bus. The LWFP can be read and written for debug purposes. For the frame discard function,
the LWFP divides the valid data region of the FIFO (the area in-between the read and write pointers) into framed and unframed data. Data
between the LWFP and write pointer constitutes an incomplete frame, while data between the read pointer and the LWFP has been received
as whole frames. When FRAME is not set, then this pointer has no meaning.
into the FIFO. The LWFP updates on FIFO write data accesses which create a frame boundary, whether that be by setting the WFC control
bit or by feeding a frame bit in on the appropriate bus. The LWFP can be read and written for debug purposes. For the frame discard function,
the LWFP divides the valid data region of the FIFO (the area in-between the read and write pointers) into framed and unframed data. Data
between the LWFP and write pointer constitutes an incomplete frame, while data between the read pointer and the LWFP has been received
as whole frames. When FRAME is not set, then this pointer has no meaning.
14.8.4
FEC Rx FIFO Alarm Pointer Register—MBAR + 0x3198
FEC Tx FIFO Alarm Pointer Register—MBAR + 0x31B8
RFIFO_ALARM and TFIFO_ALARM include pointer which provide high/low level alarm information to the user integration logic and the
BestComm interface. A low level alarm reports lack of data; a high level alarm reports lack of space. The alarm pointer is interpreted
depending on the state of the FIFO transmit input pin: if FIFO transmit = “1”, then the alarm is represented in terms of data bytes, if FIFO
Transmit = “0”, the alarm is represented in terms of free bytes. This programmable alarm can warn the system when the FIFO is almost full
of data (FIFO Transmit = “0”), or when the FIFO is almost out of data (FIFO Transmit = “1”). This register is programmed to the upper limit
for the number of bytes in the FIFO of data, when FIFO transmit is negated, or space, when FIFO transmit is asserted, before an internal alarm
is set. Any time the amount of data or space in the FIFO is above the indicated amount, the alarm will be set. The alarm is cleared when there
is less data or space than is defined as the FIFO granularity or pipeline depth. The number of bits in the alarm pointer register will vary with
the address space of the FIFO memory, and the alarm pointer is initialized to zero.
BestComm interface. A low level alarm reports lack of data; a high level alarm reports lack of space. The alarm pointer is interpreted
depending on the state of the FIFO transmit input pin: if FIFO transmit = “1”, then the alarm is represented in terms of data bytes, if FIFO
Transmit = “0”, the alarm is represented in terms of free bytes. This programmable alarm can warn the system when the FIFO is almost full
of data (FIFO Transmit = “0”), or when the FIFO is almost out of data (FIFO Transmit = “1”). This register is programmed to the upper limit
for the number of bytes in the FIFO of data, when FIFO transmit is negated, or space, when FIFO transmit is asserted, before an internal alarm
is set. Any time the amount of data or space in the FIFO is above the indicated amount, the alarm will be set. The alarm is cleared when there
is less data or space than is defined as the FIFO granularity or pipeline depth. The number of bits in the alarm pointer register will vary with
the address space of the FIFO memory, and the alarm pointer is initialized to zero.
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Reserved
LRFP[9:0]
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
0:21
—
Reserved
22:31
LRFP[9:0]
LRFP Last Read Frame Pointer.
This pointer indicates the start of the last data frame read from the FIFO by the peripheral.
Table 14-34. FEC Rx FIFO Last Write Frame Pointer Register
FEC Tx FIFO Last Write Frame Pointer Register
msb 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
Reserved
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31 lsb
R
Reserved
LRFP[9:0]
W
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
0:21
—
Reserved
22:31
LWFP[9:0]
LRFP Last WriteFrame Pointer.
This pointer indicates the start of the last data frame written into the FIFO by the peripheral.