Mitsubishi Electronics Q02HCPU ユーザーズマニュアル
A - 15 A - 15
13 OUTLINE OF MULTIPLE CPU SYSTEMS
13.1 Features
13.2 Outline of Multiple CPU Systems
13.3 Differences with Single CPU Systems
14 SYSTEM CONFIGURATION OF MULTIPLE CPU SYSTEMS
14.1 System Configuration
14.2 Precautions During Multiple CPU System Configuration
14.2.1 Function versions of High Performance model QCPU , motion CPUs and PC CPU module that
can be sued, and their mounting positions
14.2.2 Precautions when using Q series corresponding I/O modules and intelligent function modules
14.2.3 Limitations when mounting AnS series corresponding I/O modules and special function modules
14.2.4 Modules that have mounting restrictions
14.2.5 Usable GX Developers and GX Configurators
14.2.6 Parameters that enable the use of multiple CPU systems
14.2.7 Resetting the multiple CPU system
14.2.8 Processing when High Performance model QCPU stop errors occur
14.2.9 Reducing the time required for multiple CPU system processing
15 ALLOCATING MULTIPLE CPU SYSTEM I/O NUMBERS
15.1 Concept behind Allocating I/O Numbers
15.1.1 I/O modules and intelligent function module I/O numbers
15.1.2 I/O number of High Performance model QCPU, Motion CPU and PC CPU module
15.2. Purpose of PC Parameter I/O Allocations with the GX Developer
16 COMMUNICATION BETWEEN THE MULTIPLE CPU SYSTEM'S QCPUS AND MOTION CPUs
16.1 Automatic Refresh of Common CPU Memory
16.2 Communication with Multiple CPU Commands and Intelligent Function Module Devices
16.3 Interactive Communications between The High Performance model QCPU and Motion CPU
16.3.1 Control instructions from the High Performance model QCPU to the Motion CPU
16.3.2 Reading and writing device data
16.4 Common CPU Memory
17 COMMUNICATIONS BETWEEN THE MULTIPLE CPU SYSTEM'S I/O MODULES AND
INTELLIGENT FUNCTION MODULES
17.1 Range of Control PLC Communications
17.2 Range of Non-control PLC Communications