Freescale Semiconductor MCF52210 ユーザーズマニュアル
Multiply-Accumulate Unit (MAC)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
4-6
Freescale Semiconductor
4.3
Functional Description
The MAC speeds execution of ColdFire integer-multiply instructions (MULS and MULU) and provides
additional functionality for multiply-accumulate operations. By executing MULS and MULU in the MAC,
execution times are minimized and deterministic compared to the 2-bit/cycle algorithm with early
termination that the OEP normally uses if no MAC hardware is present.
additional functionality for multiply-accumulate operations. By executing MULS and MULU in the MAC,
execution times are minimized and deterministic compared to the 2-bit/cycle algorithm with early
termination that the OEP normally uses if no MAC hardware is present.
The added MAC instructions to the ColdFire ISA provide for the multiplication of two numbers, followed
by the addition or subtraction of the product to or from the value in the accumulator. Optionally, the
product may be shifted left or right by 1 bit before addition or subtraction. Hardware support for saturation
arithmetic can be enabled to minimize software overhead when dealing with potential overflow conditions.
Multiply-accumulate operations support 16- or 32-bit input operands these formats:
by the addition or subtraction of the product to or from the value in the accumulator. Optionally, the
product may be shifted left or right by 1 bit before addition or subtraction. Hardware support for saturation
arithmetic can be enabled to minimize software overhead when dealing with potential overflow conditions.
Multiply-accumulate operations support 16- or 32-bit input operands these formats:
•
Signed integers
•
Unsigned integers
•
Signed, fixed-point, fractional numbers
The MAC is optimized for 16-bit multiplications to keep the area consumption low. Two 16-bit operands
produce a 32-bit product. Longword operations are performed by reusing the 16-bit multiplier array at the
expense of a small amount of extra control logic. Again, the product of two 32-bit operands is a 32-bit
result. For longword integer operations, only the least significant 32 bits of the product are calculated. For
fractional operations, the entire 64-bit product is calculated and then truncated or rounded to a 32-bit result
using the round-to-nearest (even) method.
produce a 32-bit product. Longword operations are performed by reusing the 16-bit multiplier array at the
expense of a small amount of extra control logic. Again, the product of two 32-bit operands is a 32-bit
result. For longword integer operations, only the least significant 32 bits of the product are calculated. For
fractional operations, the entire 64-bit product is calculated and then truncated or rounded to a 32-bit result
using the round-to-nearest (even) method.
Because the multiplier array is implemented in a three-stage pipeline, MAC instructions have an effective
issue rate of 1 cycle for word operations, 3 cycles for longword integer operations, and 4 cycles for 32-bit
fractional operations.
issue rate of 1 cycle for word operations, 3 cycles for longword integer operations, and 4 cycles for 32-bit
fractional operations.
All arithmetic operations use register-based input operands, and summed values are stored in the
accumulator. Therefore, an additional MOVE instruction is needed to store data in a general-purpose
register.
accumulator. Therefore, an additional MOVE instruction is needed to store data in a general-purpose
register.
The need to move large amounts of data presents an obstacle to obtaining high throughput rates in DSP
engines. New and existing ColdFire instructions can accommodate these requirements. A MOVEM
instruction can efficiently move large data blocks by generating line-sized burst references. The ability to
load an operand simultaneously from memory into a register and execute a MAC instruction makes some
DSP operations such as filtering and convolution more manageable.
engines. New and existing ColdFire instructions can accommodate these requirements. A MOVEM
instruction can efficiently move large data blocks by generating line-sized burst references. The ability to
load an operand simultaneously from memory into a register and execute a MAC instruction makes some
DSP operations such as filtering and convolution more manageable.
The programming model includes a mask register (MASK), which can optionally be used to generate an
operand address during MAC + MOVE instructions. The register application with auto-increment
addressing mode supports efficient implementation of circular data queues for memory operands.
operand address during MAC + MOVE instructions. The register application with auto-increment
addressing mode supports efficient implementation of circular data queues for memory operands.
Table 4-5. ACC Field Descriptions
Field
Description
31–0
Accumulator
Store 32-bits of the result of the MAC operation.