Nxp Semiconductors UM10237 ユーザーズマニュアル

UM10237_2

© NXP B.V. 2008. All rights reserved.

16 bpp, direct 4:4:4 RGB, with 4 bpp not being used.

Monochrome STN panels support one or more of the following modes:

1 bpp, palettized, 2 gray scales selected from 15.

2 bpp, palettized, 4 gray scales selected from 15.

4 bpp, palettized, 16 gray scales selected from 15.

More than 4 bpp for monochrome panels can be programmed, but using these modes has 
no benefit because the maximum number of gray scales supported on the display is 15.

The largest configuration for the LCD controller uses 31 pins. There are many variants 
using as few as 10 pins for a monochrome STN panel. Pins are allocated in groups based 
on the selected configuration. All LCD functions are shared with other chip functions. In 

, only the LCD related portion of the pin name is shown.

Remark: To enable the LCD controller, see 

 

The signals that are used for various display types are identified in the following sections.

The signals used for single panel STN displays are shown in 

. UD refers to 

upper panel data.

 

LCDPWR

output

LCD panel power enable.

LCDDCLK

output

LCD panel clock.

LCDENA/LCDM

output

STN AC bias drive or TFT data enable output.

LCDFP

output

Frame pulse (STN). Vertical synchronization pulse (TFT)

LCDLE

output

Line end signal

LCDLP

output

Line synchronization pulse (STN). Horizontal synchronization pulse 
(TFT)

LCDVD[23:0]

output

LCD panel data. Bits used depend on the panel configuration.

LCDCLKIN

input

Optional clock input.

LCDPWR

Y

Y

Y

LCDDCLK

Y

Y

Y

LCDENAB/ LCDM

Y

Y

Y

LCDFP

Y

Y

Y