Nxp Semiconductors UM10237 ユーザーズマニュアル
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008
36 of 792
NXP Semiconductors
UM10237
Chapter 3: LPC24XX System control
[1]
The state of this bit is preserved through a software reset, and only a POR or a BOD event will reset it to its default value.
3.4 AHB Configuration
The AHB configuration register allows changing AHB scheduling and arbitration
strategies.
strategies.
3.4.1 AHB Arbiter Configuration register 1 (AHBCFG1 - 0xE01F C188)
By default, the AHB1 access is scheduled round-robin (bit 0 = 1). For round-robin
scheduling, the default priority sequence will be CPU, DMA, AHB1, USB and LCD.
The AHB1 access priority can be configured as priority scheduling (bit 0 = 0) and priority
of the each of the AHB1 bus masters can be set by writing the priority value (highest
priority = 5, lowest priority = 1).
scheduling, the default priority sequence will be CPU, DMA, AHB1, USB and LCD.
The AHB1 access priority can be configured as priority scheduling (bit 0 = 0) and priority
of the each of the AHB1 bus masters can be set by writing the priority value (highest
priority = 5, lowest priority = 1).
Masters with the same priority value are scheduled on a round-robin basis.
2
-
-
Reserved. User software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
read from a reserved bit is not defined.
NA
NA
3
MCIPWR
Active
Level
Active
Level
MCIPWR pin control.
R/W
0
0
The MCIPWR pin is low.
1
The MCIPWR pin is high.
4
OSCRANGE
Main oscillator range select.
R/W
0
0
The frequency range of the main oscillator is 1 MHz to 20 MHz.
1
The frequency range of the main oscillator is 15 MHz to 24 MHz.
5
OSCEN
Main oscillator enable.
R/W
0
0
The main oscillator is disabled.
1
The main oscillator is enabled, and will start up if the correct external
circuitry is connected to the XTAL1 and XTAL2 pins.
circuitry is connected to the XTAL1 and XTAL2 pins.
6
OSCSTAT
Main oscillator status.
RO
0
0
The main oscillator is not ready to be used as a clock source.
1
The main oscillator is ready to be used as a clock source. The main
oscillator must be enabled via the OSCEN bit.
oscillator must be enabled via the OSCEN bit.
31:7 -
-
Reserved. User software should not write ones to reserved bits. The value
read from a reserved bit is not defined.
read from a reserved bit is not defined.
-
NA
Table 29.
System Controls and Status register (SCS - address 0xE01F C1A0) bit description
Bit
Symbol
Value Description
Access Reset
value
Table 30.
AHB configuration register map
Name
Description
Access
Reset value
Address
AHBCFG1 Configures the AHB1 arbiter.
R/W
0x0000 0145
0xE01F C188
AHBCFG2 Configures the AHB2 arbiter.
R/W
0x0000 0145
0xE01F C18C