Nxp Semiconductors UM10237 ユーザーズマニュアル
UM10237_2
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 02 — 19 December 2008
491 of 792
NXP Semiconductors
UM10237
Chapter 18: LPC24XX CAN controllers CAN1/2
8.12 Receive Data Register B (CAN1RDB - 0xE004 402C, CAN2RDB -
0xE004 802C)
This register contains the 5th through 8th Data bytes of the current received message. It is
read-only in normal operation, but can be written for testing purposes if the RM bit in
CANMOD is 1. See
read-only in normal operation, but can be written for testing purposes if the RM bit in
CANMOD is 1. See
for details on specific CAN channel register address.
8.13 Transmit Frame Information Register (CAN1TFI[1/2/3] - 0xE004 40[30/
40/50], CAN2TFI[1/2/3] - 0xE004 80[30/40/50])
When the corresponding TBS bit in CANSR is 1, software can write to one of these
registers to define the format of the next transmit message for that Tx buffer. Bits not listed
read as 0 and should be written as 0.
registers to define the format of the next transmit message for that Tx buffer. Bits not listed
read as 0 and should be written as 0.
The values for the reserved bits of the CANxTFI register in the Transmit Buffer should be
set to the values expected in the Receive Buffer for an easy comparison, when using the
Self Reception facility (self test), otherwise they are not defined.
set to the values expected in the Receive Buffer for an easy comparison, when using the
Self Reception facility (self test), otherwise they are not defined.
The CAN Controller consist of three Transmit Buffers. Each of them has a length of 4
words and is able to store one complete CAN message as shown in
words and is able to store one complete CAN message as shown in
.
The buffer layout is subdivided into Descriptor and Data Field where the first word of the
Descriptor Field includes the TX Frame Info that describes the Frame Format, the Data
Length and whether it is a Remote or Data Frame. In addition, a TX Priority register allows
the definition of a certain priority for each transmit message. Depending on the chosen
Frame Format, an 11-bit identifier for Standard Frame Format (SFF) or an 29-bit identifier
for Extended Frame Format (EFF) follows. Note that unused bits in the TID field have to
be defined as 0. The Data Field in TDA and TDB contains up to eight data bytes.
Descriptor Field includes the TX Frame Info that describes the Frame Format, the Data
Length and whether it is a Remote or Data Frame. In addition, a TX Priority register allows
the definition of a certain priority for each transmit message. Depending on the chosen
Frame Format, an 11-bit identifier for Standard Frame Format (SFF) or an 29-bit identifier
for Extended Frame Format (EFF) follows. Note that unused bits in the TID field have to
be defined as 0. The Data Field in TDA and TDB contains up to eight data bytes.
15:8
Data 2
If the DLC field in CANRFS
≥
0010, this contains the first Data byte
of the current received message.
0
X
23:16 Data 3
If the DLC field in CANRFS
≥
0011, this contains the first Data byte
of the current received message.
0
X
31:24 Data 4
If the DLC field in CANRFS
≥
0100, this contains the first Data byte
of the current received message.
0
X
Table 431. Receive Data register A (CAN1RDA - address 0xE004 4028, CAN2RDA - address
0xE004 8028) bit description
Bit
Symbol Function
Reset
Value
Value
RM
Set
Set
Table 432. Receive Data register B (CAN1RDB - address 0xE004 402C, CAN2RDB - address
0xE004 802C) bit description
Bit
Symbol Function
Reset
Value
Value
RM
Set
Set
7:0
Data 5
If the DLC field in CANRFS
≥
0101, this contains the first Data byte
of the current received message.
0
X
15:8
Data 6
If the DLC field in CANRFS
≥
0110, this contains the first Data byte
of the current received message.
0
X
23:16 Data 7
If the DLC field in CANRFS
≥
0111, this contains the first Data byte
of the current received message.
0
X
31:24 Data 8
If the DLC field in CANRFS
≥
1000, this contains the first Data byte
of the current received message.
0
X