Nxp Semiconductors UM10237 ユーザーズマニュアル

UM10237_2

© NXP B.V. 2008. All rights reserved.

[1]

LPC247x only.

After every reset, the PCONP register contains the value that enables selected interfaces 
and peripherals controlled by the PCONP to be enabled. Therefore, apart from proper 
configuring via peripheral dedicated registers, the user’s application might have to access 
the PCONP in order to start using some of the on-board peripherals.

Power saving oriented systems should have 1s in the PCONP register only in positions 
that match peripherals really used in the application. All other bits, declared to be 
"Reserved" or dedicated to the peripherals not used in the current application, must be 
cleared to 0.

The LPC2400 provides two independent power domains that allow the bulk of the device 
to have power removed while maintaining operation of the Real Time Clock and the 
Battery RAM.

The VBAT pin supplies power only to the RTC and the Battery RAM. These two functions 
require a minimum of power to operate, which can be supplied by an external battery. 
When the CPU and the rest of chip functions are stopped and power removed, the RTC 
can supply an alarm output that may be used by external hardware to restore chip power 
and resume operation. Details may be found in 

Note: The RTC and the battery RAM operate independently from each other. Therefore, 
the battery RAM can be accessed at any time, regardless of whether the RTC is enabled 
or disabled via a dedicated bit in the PCONP register.

The LPC2400 begins operation at power-up and when awakened from Power-down mode 
by using the 4 MHz IRC oscillator as the clock source. This allows chip operation quickly 
in these cases. If the main oscillator or the PLL is needed by the application, software will 
need to enable these features and wait for them to stabilize before they are used as a 
clock source.

When the main oscillator is initially activated, the wakeup timer allows software to ensure 
that the main oscillator is fully functional before the processor uses it as a clock source 
and starts to execute instructions. This is important at power-on, all types of Reset, and 

27

PCI2S

I

2

S interface power/clock control bit.

0

28

PCSDC

SD card interface power/clock control bit.

0

29

PCGPDMA GP DMA function power/clock control bit.

0

30

PCENET

Ethernet block power/clock control bit.

0

31

PCUSB

USB interface power/clock control bit.

0