HP (Hewlett-Packard) 9112 Series ユーザーズマニュアル
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• Operation Theorem
External Trigger
Through the pin-17 of CN3 (ExtTrig), the A/D conversion also can be
performed when a rising edge of external signal is occurred. The
conversion rate of this mode is more flexible than the previous two modes,
because the users can handle the external signal by outside device. The
external trigger can combine with the DMA transfer, interrupt data transfer,
or even program polling data transfer. Generally, the interrupt data
transfer is often used when external trigger mode is used.
4.2.3
A/D Data Transfer Modes
On the PCI-9112, three A/D data transfer modes can be used when the
conversion is completed. The data transfer mode is controlled by the A/D
mode control bits (INTX, DMAX) of the A/D control register (BASE+18).
The different transfer modes are specified as follows:
Software Data Transfer (DRDY)
Usually, this mode is used with software A/D trigger mode. After the A/D
conversion is triggered by software, the software should poll the DRDY bit
on the A/D Status register until it becomes to high level. Whenever the
low byte of A/D data is read, the DRDY bit will be cleared to indicate the
data is read out.
It is possible to read A/D converted data without polling. The A/D
conversion time will not excess 8
conversion is completed. The data transfer mode is controlled by the A/D
mode control bits (INTX, DMAX) of the A/D control register (BASE+18).
The different transfer modes are specified as follows:
Software Data Transfer (DRDY)
Usually, this mode is used with software A/D trigger mode. After the A/D
conversion is triggered by software, the software should poll the DRDY bit
on the A/D Status register until it becomes to high level. Whenever the
low byte of A/D data is read, the DRDY bit will be cleared to indicate the
data is read out.
It is possible to read A/D converted data without polling. The A/D
conversion time will not excess 8
µ
s on PCI-9112 card. Hence, after
software trigger, the software can wait for at least 8
µ
s then read the A/D
register without polling.
Interrupt Transfer (INTX)
The PCI-9112 provides hardware interrupt capability. Under this mode, an
interrupt signal is generated when the A/D conversion is ended and the
data is ready to be read. It is useful to combine the interrupt transfer with
the timer pacer trigger mode. Under this mode, the data transfer is
essentially asynchronous with the control software.
When the interrupt transfer is used, the hardware interrupt will be inserted
and its corresponding ISR (Interrupt Service Routine) will be invoked and
executed after A/D conversion is completed. The converted data is
transferred by the ISR program. In PCI design, the IRQ level is assigned
by BIOS directly.
Interrupt Transfer (INTX)
The PCI-9112 provides hardware interrupt capability. Under this mode, an
interrupt signal is generated when the A/D conversion is ended and the
data is ready to be read. It is useful to combine the interrupt transfer with
the timer pacer trigger mode. Under this mode, the data transfer is
essentially asynchronous with the control software.
When the interrupt transfer is used, the hardware interrupt will be inserted
and its corresponding ISR (Interrupt Service Routine) will be invoked and
executed after A/D conversion is completed. The converted data is
transferred by the ISR program. In PCI design, the IRQ level is assigned
by BIOS directly.