Motorola MCF5282 ユーザーズマニュアル
23-20
MCF5282 User’s Manual
MOTOROLA
Operation
therefore UBG1n = 0x00 and UBG2n = 0xD6.
23.5.1.2.2 External Clock
An external source clock (DTINn) can be used as is or divided by 16.
23.5.2 Transmitter and Receiver Operating Modes
Figure 23-19 is a functional block diagram of the transmitter and receiver showing the
command and operating registers, which are described generally in the following sections
and described in detail in Section 23.3, “Register Descriptions.”
command and operating registers, which are described generally in the following sections
and described in detail in Section 23.3, “Register Descriptions.”
Figure 23-19. Transmitter and Receiver Functional Diagram
23.5.2.1 Transmitter
The transmitter is enabled through the UART command register (UCRn). When it is ready
to accept a character, the UART sets USRn[TxRDY]. The transmitter converts parallel data
to accept a character, the UART sets USRn[TxRDY]. The transmitter converts parallel data
Divider
66MHz
32 x 9600
[
]
----------------------------
215 decimal
(
)
00D6 hexadecimal
(
)
=
=
=
Baudrate
Externalclockfrequency
16or1
[
] 16bitdivider
[
]
----------------------------------------------------------------
=
Receiver Shift Register
UART Command Register (UCRn)
W
UART Status Register (USRn)
R
Transmitter Shift Register
UART Mode Register 1 (UMR1n)
R/W
UART Mode Register 2 (UMR2n)
R/W
Transmitter Holding Register
W
Receiver Holding Register 3
Receiver Holding Register 2
Receiver Holding Register 1
R
UART Receive
UART
Buffer (URBn)
(4 Registers)
UARTn
External
Interface
URXD
UTXD
Transmit Buffer
(UTBn)
(2 Registers)
FIFO