Motorola MCF5282 ユーザーズマニュアル

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Chapter 26.  General Purpose I/O Module  
26-21
Memory Map/Register Definition
26.3.2.12  Port QS Pin Assignment Register (PQSPAR)
The PQSPAR controls the pin function of port QS.
Table 26-15. PEHLPAR Field Descriptions
Bits
Name
Description
7
PEHPA
Port EH pin assignment. This bit configures the port EH pins for its primary 
functions (ETXCLK, ETXEN, ETXD[0], ECOL, ERXCLK, ERXDV, ERXD[0], 
ECRS) or digital I/O.
1 Port EH pins configured for primary functions (ETXCLK, ETXEN, ETXD[0], 
ECOL, ERXCLK, ERXDV, ERXD[0], ECRS)
0 Port EH pins configured for digital I/O
6
PELPA
Port EL pin assignment. This bit configures the port EL pins for their primary 
functions (ETXD[3], ETXD[2], ETXD[1], ETXER, ERXD[3], ERXD[2], 
ERXD[1], ERXER) or digital I/O.
1 Port EL pins configured for primary functions (ETXD[3], ETXD[2], ETXD[1], 
ETXER, ERXD[3], ERXD[2], ERXD[1], ERXER)
0 Port EL pins configured for digital I/O
5–0
Reserved, should be cleared.
7
6
5
4
3
2
1
0
Field
PQSPA6
PQSPA5
PQSPA4
PQSPA3
PQSPA2
PQSPA1
PQSPA0
Reset
0000_0000
R/W:
R
R/W
Address
IPSBAR + 0x10_0059 
Figure 26-25. Port QS Pin Assignment Register (PQSPAR)
Table 26-16. PQSPAR Field Description
Bits
Name
Description
7
Reserved, should be cleared.
6
PQSPA6
Port QS pin assignment 6. This bit configures the port QS6 pin for its primary 
function (QSPI_CS3) or digital I/O.
1 Port QS6 pin configured for primary function (QSPI_CS3)
0 Port QS6 pin configured for digital I/O
5
PQSPA5
Port QS pin assignment 5. This bit configures the port QS5 pin for its primary 
function (QSPI_CS2) or digital I/O.
1 Port QS5 pin configured for primary function (QSPI_CS2)
0 Port QS5 pin configured for digital I/O
4
PQSPA4
Port QS pin assignment 4. This bit configures the port QS4 pin for its primary 
function (QSPI_CS1) or digital I/O.
1 Port QS4 pin configured for primary function (QSPI_CS1)
0 Port QS4 pin configured for digital I/O
3
PQSPA3
Port QS pin assignment 3. This bit configures the port QS3 pin for its primary 
function (QSPI_CS0) or digital I/O.
1 Port QS3 pin configured for primary function (QSPI_CS0)
0 Port QS3 pin configured for digital I/O