Motorola MCF5282 ユーザーズマニュアル

28-2

MOTOROLA

 

Figure 28-1 illustrates the reset controller and is explained in the following sections.

Table 28-1 provides a summary of the reset controller signal properties. The signals are
described in the following paragraphs.

Asserting the external RSTI for at least four rising CLKOUT edges causes the external reset
request to be recognized and latched.

This active-low output signal is driven low when the internal reset controller module resets
the chip. When RSTO is active, the user can drive override options on the data bus.

RSTI

I

Y

Y

 1

1

RSTI is always synchronized except when in low-power stop mode.

RSTO

O

—

—

Power-On

Reset

Watchdog

Timer Timeout

PLL

Loss of Clock

PLL

Loss of Lock

Software

Reset

LVD

Detect

RSTI

Pin

Reset

Controller

RSTO

Pin

To Internal Resets