Motorola MCF5282 ユーザーズマニュアル
MOTOROLA
Chapter 2. ColdFire Core
2-11
Exception Processing Overview
Third, the processor saves the current context by creating an exception stack frame on the
supervisor system stack. As a result, the exception stack frame is created at a 0-modulo-4
address on the top of the current system stack. Additionally, the processor uses a simplified
fixed-length stack frame for all exceptions. The exception type determines whether the
program counter placed in the exception stack frame defines the location of the faulting
instruction (fault) or the address of the next instruction to be executed (next).
supervisor system stack. As a result, the exception stack frame is created at a 0-modulo-4
address on the top of the current system stack. Additionally, the processor uses a simplified
fixed-length stack frame for all exceptions. The exception type determines whether the
program counter placed in the exception stack frame defines the location of the faulting
instruction (fault) or the address of the next instruction to be executed (next).
Fourth, the processor calculates the address of the first instruction of the exception handler.
By definition, the exception vector table is aligned on a 1 Mbyte boundary. This instruction
address is generated by fetching an exception vector from the table located at the address
defined in the vector base register. The index into the exception table is calculated as (4 x
vector number). Once the exception vector has been fetched, the contents of the vector
determine the address of the first instruction of the desired handler. After the instruction
fetch for the first opcode of the handler has been initiated, exception processing terminates
and normal instruction processing continues in the handler.
By definition, the exception vector table is aligned on a 1 Mbyte boundary. This instruction
address is generated by fetching an exception vector from the table located at the address
defined in the vector base register. The index into the exception table is calculated as (4 x
vector number). Once the exception vector has been fetched, the contents of the vector
determine the address of the first instruction of the desired handler. After the instruction
fetch for the first opcode of the handler has been initiated, exception processing terminates
and normal instruction processing continues in the handler.
All ColdFire processors support a 1024-byte vector table aligned on any 1 Mbyte address
boundary (see Table 2-5). The table contains 256 exception vectors; the first 64 are defined
by Motorola and the remaining 192 are user-defined interrupt vectors.
boundary (see Table 2-5). The table contains 256 exception vectors; the first 64 are defined
by Motorola and the remaining 192 are user-defined interrupt vectors.
Table 2-5. Exception Vector Assignments
Vector
Number(S)
Vector
Offset (Hex)
Stacked
Program
Counter
Assignment
0
0x000
—
Initial stack pointer
1
0x004
—
Initial program counter
2
0x008
Fault
Access error
3
0x00C
Fault
Address error
4
0x010
Fault
Illegal instruction
5
0x014
Fault
Divide by zero
6–7
0x018–0x01C
—
Reserved
8
0x020
Fault
Privilege violation
9
0x024
Next
Trace
10
0x028
Fault
Unimplemented line-a opcode
11
0x02C
Fault
Unimplemented line-f opcode
12
0x030
Next
Debug interrupt
13
0x034
—
Reserved
14
0x038
Fault
Format error
15–23
0x03C–0x05C
—
Reserved
24
0x060
Next
Spurious interrupt
25–31
0x064-0x07C
—
Reserved
32–47
0x080–0x0BC
Next
Trap # 0-15 instructions
48–63
0x0C0–0x0FC
—
Reserved