Motorola MVME172 ユーザーズマニュアル
LCSR Programming Model
http://www.mcg.mot.com/literature
2-89
2
Interrupt Level Register 1 (bits 16-23)
This register is used to define the level of the SYSFAIL interrupt and the
master write post bus error interrupt.
master write post bus error interrupt.
WPE LEVEL These bits define the level of the master write post bus
error interrupt.
SYSF LEVEL These bits define the level of the SYSFAIL interrupt.
Interrupt Level Register 1 (bits 8-15)
This register is used to define the level of the VMEbus IRQ1
edge-sensitive interrupt and the level of the external (parity error)
interrupt.
edge-sensitive interrupt and the level of the external (parity error)
interrupt.
IRQ1E LEVEL These bits define the level of the VMEbus IRQ1
edge-sensitive interrupt.
PE LEVEL
Not used on MVME172.
ADR/SIZ
$FFF40078 (8 bits [6 used] of 32)
BIT
23
22
21
20
19
18
17
16
NAME
SYSF LEVEL
WPE LEVEL
OPER
R/W
R/W
RESET
0 PSL
0 PSL
ADR/SIZ
$FFF40078 (8 bits [6 used] of 32)
BIT
15
14
13
12
11
10
9
8
NAME
PE LEVEL
IRQ1E LEVEL
OPER
R/W
R/W
RESET
0 PSL
0 PSL