Motorola MC9S12GC-Family ユーザーズマニュアル

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The Low Voltage Reset feature uses the low voltage reset signal from the VREG module as an input to the
CRG module. When the regulator output voltage supply to the internal chip logic falls below a specified
threshold the LVR signal from the VREG module causes the CRG module to generate a reset. Consult the
VREG Block User Guide for voltage level specifications.

The XCLKS input signal is active low (see

Consult the OSC Block User Guide for information about the Oscillator module.

Consult the TIM_16B8C Block User Guide for information about the Timer module.

In the 48 and 52 pin package versions, the VRL pad is bonded internally to the VSSA pin.

Consult the ATD_10B8C Block User Guide for further information about the A/D Converter module.

Consult the SCI Block User Guide for information about the Asynchronous Serial Communications
Interface module.

Consult the SPI Block User Guide for information about the Serial Peripheral Interface module.