Epson S1D13504 ユーザーズマニュアル
Page 98
Epson Research and Development
Vancouver Design Center
S1D13504
Hardware Functional Specification
X19A-A-002-18
Issue Date: 01/01/30
bits 4-2
Number of Bits-Per-Pixel Select Bits [2:0]
These bits select the number of bits-per-pixel (bpp) for the displayed data.
These bits select the number of bits-per-pixel (bpp) for the displayed data.
Note
15 and 16-bpp modes bypass the LUT and are supported as 12-bpp on passive panels and 15/16-
bpp on TFT panels. These modes are not supported on CRT. See Figure 10-2: “15/16 Bit-Per-
Pixel Format Memory Organization,” on page 117 for a description of passive panel support.
bpp on TFT panels. These modes are not supported on CRT. See Figure 10-2: “15/16 Bit-Per-
Pixel Format Memory Organization,” on page 117 for a description of passive panel support.
bit 1
CRT Enable
This bit enables the CRT control signals.
This bit enables the CRT control signals.
Note
REG[02h] bit 1 must = 0 when in CRT only mode.
bit 0
LCD Enable
This bit enables the LCD control signals. Programming this bit from a 0 to a 1 starts the LCD
power-on sequence. Programming this bit from a 1 to a 0 starts the LCD power-off sequence.
This bit enables the LCD control signals. Programming this bit from a 0 to a 1 starts the LCD
power-on sequence. Programming this bit from a 1 to a 0 starts the LCD power-off sequence.
Table 8-7: Number of Bits-Per-Pixel Selection
Number Of Bits-Per-Pixel Select Bits [2:0]
Number of Bits-Per-Pixel
000
1
001
2
010
4
011
8
100
15
101
16
110-111
Reserved