Motorola MVME2600 ユーザーズマニュアル
System Considerations
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The MVME2603/2604 contains shared onboard DRAM (and, optionally,
secondary cache memory) whose base address is software-selectable. Both
the onboard processor and offboard VMEbus devices see this local DRAM
at base physical address $00000000, as programmed by the firmware. This
may be changed via software to any other base address. Refer to the
MVME2600 Series Single Board Computer Programmer’s Reference
Guide, listed in
secondary cache memory) whose base address is software-selectable. Both
the onboard processor and offboard VMEbus devices see this local DRAM
at base physical address $00000000, as programmed by the firmware. This
may be changed via software to any other base address. Refer to the
MVME2600 Series Single Board Computer Programmer’s Reference
Guide, listed in
, for more
information.
If the MVME2603/2604 tries to access offboard resources in a nonexistent
location and is not system controller, and if the system does not have a
global bus timeout, the MVME2603/2604 waits forever for the VMEbus
cycle to complete. This will cause the system to lock up. There is only one
situation in which the system might lack this global bus timeout: when the
MVME2603/2604 is not the system controller and there is no global bus
timeout elsewhere in the system.
location and is not system controller, and if the system does not have a
global bus timeout, the MVME2603/2604 waits forever for the VMEbus
cycle to complete. This will cause the system to lock up. There is only one
situation in which the system might lack this global bus timeout: when the
MVME2603/2604 is not the system controller and there is no global bus
timeout elsewhere in the system.
Multiple MVME2603/2604s may be installed in a single VME chassis. In
general, hardware multiprocessor features are supported.
general, hardware multiprocessor features are supported.
Other MPUs on the VMEbus can interrupt, disable, communicate with,
and determine the operational status of the processor(s). One register of the
GCSR (global control/status register) set includes four bits that function as
location monitors to allow one MVME2603/2604 processor to broadcast a
signal to any other MVME2603/2604 processors. All eight registers are
accessible from any local processor as well as from the VMEbus.
and determine the operational status of the processor(s). One register of the
GCSR (global control/status register) set includes four bits that function as
location monitors to allow one MVME2603/2604 processor to broadcast a
signal to any other MVME2603/2604 processors. All eight registers are
accessible from any local processor as well as from the VMEbus.
The MVME2603/2604 VME module draws +5V DC, +12V DC, and
–12V DC power from the VMEbus backplane through connectors P1 and
P2. The 3.3V DC and the processor core voltage power is supplied by the
on-board +5V DC.
–12V DC power from the VMEbus backplane through connectors P1 and
P2. The 3.3V DC and the processor core voltage power is supplied by the
on-board +5V DC.
MVME2603/2604 VME Module
The MVME2603/2604 VME module furnishes +12V DC and (in
MVME761 I/O mode) –12V DC power to the transition module through
polyswitches (resettable fuses) R34 and R28 respectively. These voltage
sources power the serial port drivers and any LAN transceivers connected
to the transition module. Fused +5V DC power is supplied to the base
board’s keyboard and mouse connectors through polyswitch R30 and to
MVME761 I/O mode) –12V DC power to the transition module through
polyswitches (resettable fuses) R34 and R28 respectively. These voltage
sources power the serial port drivers and any LAN transceivers connected
to the transition module. Fused +5V DC power is supplied to the base
board’s keyboard and mouse connectors through polyswitch R30 and to