Siemens ERTEC200 ユーザーズマニュアル
No.
Signal
Name
Name
Alternative
Function 1
Function 1
Alternative
Function 2
Function 2
Alternative
Function 3
Function 3
I/O
(Reset)
Pull-
PIN
No.
Comment
General Purpose I/O / I/O
23 GPIO22
SPI1_SFRMIN
DBGACK
B/I/O/(I)
up
F10
GPIO or SPI1 (I) or
Debug (O)
This GPIO is used as
chip select when
booting from Nand
Flash or SPI ROM.
Debug (O)
This GPIO is used as
chip select when
booting from Nand
Flash or SPI ROM.
24 GPIO23
SPI1_SCLKIN
Reserved
B/I/O/(I)
up
D10
GPIO or SPI1 (I)
This GPIO is used as
chip select when
booting from SPI Flash
or SPI EEPROM.
This GPIO is used as
chip select when
booting from SPI Flash
or SPI EEPROM.
25 GPIO24
PLL_EXT_IN_N
B/I (I)
up
B11
GPIO or MC_PLL (I)
26 GPIO25
TGEN_OUT1_N
*1
B/O/(I)
up
B9
GPIO or MC_PLL (O)
27 GPIO26
TGEN_OUT2_N
B/O/(I)
up
A7
GPIO or MC_PLL (O)
28 GPIO27
TGEN_OUT3_N
B/O/(I)
up
B10
GPIO or MC_PLL (O)
29 GPIO28
TGEN_OUT4_N
B/O/(I)
up
F9
GPIO or MC_PLL (O)
30 GPIO29
TGEN_OUT5_N
B/O/(I)
up
E9
GPIO or MC_PLL (O)
31 GPIO30
TGEN_OUT6_N
B/O/(I)
up
B8
GPIO (interrupt-
capable) or MC_PLL
(O)
capable) or MC_PLL
(O)
32 GPIO31
DBGREQ
B/I (I)
up
E8
GPIO (interrupt-
capable) or DEBUG (I)
capable) or DEBUG (I)
*1 For an IRT application pin GPIO25 is default parameterized as alternate function1 (TGEN_OUT1_N). A
synchronous clock is issued at this pin. During the certification process of a PROFINET IO DEVICE with IRT
functionality this pin has to be accessible from outside (mandatory).
Different GPIO’s are used on the Evaluation Board EB200. See Dokument /14/ Table 6.
synchronous clock is issued at this pin. During the certification process of a PROFINET IO DEVICE with IRT
functionality this pin has to be accessible from outside (mandatory).
Different GPIO’s are used on the Evaluation Board EB200. See Dokument /14/ Table 6.
1.5.2
JTAG and Debug
No.
Signal
Name
Name
I/O
(Reset)
Pull-
PIN
No.
Comment
Debug / JTAG (BOUNDARY SCAN)
33 TRST_N
I (I)
U10
JTAG Reset
34 TCK
I (I)
up
W7
JTAG Clock
35 TDI
I (I)
up
U9
JTAG Data In
36 TMS
I (I)
up
V7
JTAG Test Mode Select
37 TDO
O (O)
V9
JTAG Data Out
38 SRST_N
B (O)
up
V8
Hardware Reset
39 TAP_SEL
I (I)
up
W8
Select TAP Controller:
0: Boundary Scan TAP Controller
selected
1: ARM-TAP Controller selected
or Scan Clock (Scan mode)
0: Boundary Scan TAP Controller
selected
1: ARM-TAP Controller selected
or Scan Clock (Scan mode)
1.5.3 Trace
Port
No.
Signal
Name
Name
I/O
(Reset)
Pull-
PIN
No.
Comment
Trace Port/Other
40 TRACECLK
B (O)
AB4
ETM Trace Clock
41 Reserved
I (I)
up
U19
Connect pin to GND
Copyright © Siemens AG 2007. All rights reserved.
13
ERTEC 200 Manual
Technical data subject to change Version 1.1.0