Siemens ERTEC200 ユーザーズマニュアル
7.1 Page Range Setting
The page size of each page is set in the PAGEx_RANGE_HIGH and PAGEx_RANGE_LOW range registers (x = 0 to 3).
Together, the two page range registers yield a 32-bit address register. The size of the page varies between 256 bytes
and 2 MBytes. Therefore, Bits 0 to 7 and Bits 22 to 31 of the PAGEx_RANGE register remain unchanged at a value of 0
even if a value of 1 is entered. If no bit at all is set in one of the PAGE RANGE registers, the range of this page is set to
256 bytes, by default. If several bits are set to 1 in one of the PAGE RANGE registers, the range is always calculated
based on the most significant bit (see Example 2 in the table below).
Together, the two page range registers yield a 32-bit address register. The size of the page varies between 256 bytes
and 2 MBytes. Therefore, Bits 0 to 7 and Bits 22 to 31 of the PAGEx_RANGE register remain unchanged at a value of 0
even if a value of 1 is entered. If no bit at all is set in one of the PAGE RANGE registers, the range of this page is set to
256 bytes, by default. If several bits are set to 1 in one of the PAGE RANGE registers, the range is always calculated
based on the most significant bit (see Example 2 in the table below).
PAGEx_RANGE_HIGH
PAGEx_RANGE_LOW
Size of Page x
31 2423 16
15 8 7 0
00000000 00010000
01000000 00000000
1 Mbyte
00000000 00000110
00000000 00000000
256 Kbytes
00000000 00000010
00000000 00000000
128 Kbytes
00000000 00000000
00000001 00000000
256 bytes
Table 20: Setting of Various Page Sizes
The largest page determines the number of addresses that have to be connected to the LBU. In the page range table
above, the largest page is 1 Mbyte (i = Bit 20). The maximum addresses are calculated from Amax = 20 – 1. In this case,
address cables A [19:0] are required.
This addressing mechanism results in a mirroring of the specified page size in the total segment.
above, the largest page is 1 Mbyte (i = Bit 20). The maximum addresses are calculated from Amax = 20 – 1. In this case,
address cables A [19:0] are required.
This addressing mechanism results in a mirroring of the specified page size in the total segment.
7.2 Page Offset Setting
The page offset of each page is set in the PAGEx_OFFSET_HIGH and PAGEx_OFFSET_LOW range registers (x = 0 to
3). Together, the two page offset registers yield a 32-bit address register. The register is evaluated in such a way that
the offset is evaluated only up to the highest set bit of the associated page range register. These bits are then switched
to the AHB bus as the highest address. The following table shows some examples for an offset calculation.
3). Together, the two page offset registers yield a 32-bit address register. The register is evaluated in such a way that
the offset is evaluated only up to the highest set bit of the associated page range register. These bits are then switched
to the AHB bus as the highest address. The following table shows some examples for an offset calculation.
PAGEx_ OFFSET _HIGH
PAGEx_ OFFSET _LOW
Offset for Page x
31 2423 16
15 8 7 0
01000000 00000000
00000000 00000000
1 Gbyte
00010000 00000000
00000000 00000000
256 Mbytes
00000000 00000001
00000000 00000000
64 Kbytes
00000000 00000000
00000001 00000000
256 bytes
Table 21: Setting of Various Offset Areas
Because the host computer can always access the page registers, the pages can be reassigned at any time This is
useful, for example, if a page is to be used to initialize the I/O. If access to this address area is no longer required after
the initialization, the page can then be reassigned in order to access other address areas of the ERTEC 200.
useful, for example, if a page is to be used to initialize the I/O. If access to this address area is no longer required after
the initialization, the page can then be reassigned in order to access other address areas of the ERTEC 200.
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ERTEC 200 Manual
Technical data subject to change Version 1.1.0