HP (Hewlett-Packard) DL585 G7 ユーザーズマニュアル
Hardware options installation 45
When Online Spare memory is enabled, one of the ranks is set aside as the Online spare rank. In the event
that ranks of different sizes are on the same memory channel, a rank is selected that will be able to contain
any of the ranks in the event of an Online spare switchover.
If a DIMM rank on a given memory channel exceeds its correctable ECC threshold, then the contents of the
any of the ranks in the event of an Online spare switchover.
If a DIMM rank on a given memory channel exceeds its correctable ECC threshold, then the contents of the
failing DIMM rank is copied to the spare DIMM rank. Once the copy is complete, all memory accesses to the
previous failing DIMM rank go to the spare DIMM rank. Online spare is handled on a per memory channel
basis.
No performance penalty occurs for rank-sparing, other than the time it takes to copy the data from the failing
basis.
No performance penalty occurs for rank-sparing, other than the time it takes to copy the data from the failing
rank to the spare rank upon an error condition.
The following population rules apply to each memory cartridge. Begin with the population order (on page
The following population rules apply to each memory cartridge. Begin with the population order (on page
) and the following additional constraints:
•
All installed processors must contain a valid sparing configuration.
•
•
Install at least two ranks on a given channel.
Rank sparing cannot be enabled if one single rank DIMM is on a given channel. For example, if one
single rank DIMM is populated (following the population rules) on all the channels on a processor, then
Rank sparing cannot be enabled if one single rank DIMM is on a given channel. For example, if one
single rank DIMM is populated (following the population rules) on all the channels on a processor, then
Online spare cannot be enabled. To support Online spare in this case, the DIMMs would have to be
paired together on a single channel.
Memory bus speed
Depending on the quantity and native speed of the memory modules installed, memory bus speeds can be
1333 MHz, 1066 MHz, 800 MHz, or 667 MHz. Memory bus speeds can be different for each processor.
To determine memory bus speeds:
To determine memory bus speeds:
1.
Within RBSU, select the Power Management Options menu > Advanced Power Management Options
menu > Maximum Memory Bus Frequency menu.
menu > Maximum Memory Bus Frequency menu.
2.
Select one of the following menu options:
o
Auto (default)—The memory bus speed is set to what is shown in the following table. If the native
speed of the installed memory module is slower than the memory bus speed, the memory bus speed
speed of the installed memory module is slower than the memory bus speed, the memory bus speed
is set to the memory module native speed.
Memory
modules per
channel
QR
SR or DR Memory
module native
speed
Memory bus speed
(standard-voltage
memory module)
Memory bus speed
(low-voltage memory
module)
1
—
1
SR 1333 MHz
DR 1333 MHz
DR 1066 MHz
DR 1066 MHz
1333 MHz
1333 MHz
1
1
—
QR 1066 MHz 1066 MHz
1066 MHz
2
—
2
SR 1333 MHz
DR 1333 MHz
DR 1066 MHz
1333 MHz
1333 MHz
2
1
1
SR 1333 MHz
DR 1333 MHz
DR 1066 MHz
DR 1066 MHz
QR 1066 MHz
800 MHz
800 MHz
3
—
3 SR
SR 1333 MHz
1066 MHz
1066 MHz
3
—
3 DR
DR 1333 MHz 1066 MHz
800 MHz