HP (Hewlett-Packard) HP 85660B ユーザーズマニュアル

All phase lock loops in the HP 8566B are referenced to the A22 10 MHz Frequency Standard.
The 10 MHz Frequency Standard is used to directly phase-lock the 

 100 MHz VCXO

only. All other phase lock loops receive their reference from either the 

 or 

 (10 and

20 MHz from the 

 and 100 and 400 MHz from the 

A malfunction of the 100 MHz VCXO is indicated by all phase lock error messages 

and 

being

displayed on the HP 8566B CRT. Table 1 lists the phase lock error messages, related
reference, location for measurement, and signal level.

Table 1. Phase Lock Error Messages

Phase Lock Error Message

Reference

output

Level

Frequency

Connector

 UNLOCK

100 MHz

0

 UNLOCK

10 MHz

0

PL2 UNLOCK

10 MHz

0

YTO UNLOCK and M/N UNLOCK 400 MHz

  - 1 0

YTO UNLOCK and M/N UNLOCK

20 

0

 UNLOCK

100 MHz

0

All Flags

100 MHz

0

 Measure output 

at end of 

 96 cable.

The M/N Loop consists of a 355 to 395 MHz VCO, part of 

 and a phase detector, part

of 

 The output of the VCO is divided by two and is used to drive the 

 Sampler

assembly. This divided signal is disabled by means of control line LMNE during sweeps when
the frequency span is greater than 5 MHz (fundamental mixing). The two divider numbers, M
and N, are selected by the Al5 Controller such that the Nth harmonic (same as the N divide
number) of the divided VCO output changes in exactly 10 MHz increments as M is changed.

A7 1