HP (Hewlett-Packard) HP 85660B ユーザーズマニュアル

Other divide numbers are provided through the pulse swallowing technique. The output

frequency is held by the lock loop to 500 

 If N input pulses per second are swallowed,

the input frequency must rise by N Hz to keep the output constant. If N input pulses are
swallowed for each output pulse, input frequency must rise by N x 500 

The pulse swallow synchronizer accepts pulses from the fractional counter and integer counter,
and at the proper time, as determined by the CLK line, drops the PSW line to swallow input
pulses.

U7 is a presettable counter which is preset to an externally programmable count by the RST

line. RST pulses come from the direct divide output, and occur at a 500 

 rate. After

each RST pulse, U7 counts CLK pulses until a count of 9 is reached. A count of 9 causes the
output of 

 to go high. The pulse swallow synchronizer drops the PSW line on 

 pulse

after the RST pulse, and raises it two CLK pulses after 

 goes high. PSW therefore is low

one CLK pulse longer than the count time. If U7 is preset to N, (9-N) + 1 input pulses will
be swallowed for each CLK pulse, forcing the input frequency to rise by (10-N) x 500 

U5 and U6 are rate multipliers. They provide the function 

 = 

 

 where N is a

two digit BCD number (8 bits). The least significant digit goes to U5, the other to U6. The
output comes from U5 and triggers a 1.6 

 pulse from one-shot multivibrator 

The input frequency to the rate multipliers is 500 

 so 

 = N x 5 

The output from 

 goes to 

 A high input at 

 causes the synchronizer to swallow

one less pulse per RST pulse than it would have other wise. The fractional counter therefore
causes the input frequency to drop by N 

5 

 where N ranges from 0 to 99.

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