HP (Hewlett-Packard) HP 85660B ユーザーズマニュアル

The 

 Sampler mixes the output of the 

 YTO (RF INPUT) with the Nth

harmonic of the output of the A7 M/N Reference Loop (M/N IN). The 20 to 30 MHz
difference signal (IF OUT) is output to the 

 YTO Phase Detector to be compared

with the 20 to 30 MHz 

 IN) from the A10 

 Synthesizer for the purpose of phase

locking.

The output of the A7 M/N Reference Loop (M/N IN) is applied to common-base amplifier
Q3. The output of Q3 is ac coupled to common-emitter amplifier QS. The output of 

 is

passed through an impedance matching network which provides maximum drive power to
AllUl Sampler. Adjustments Cl and C2 optimize this impedance match.

AllUl Sampler contains a step recovery diode (SRD) circuit to create harmonics of the M/N
IN signal which are mixed with the low-level (-15 

 RF INPUT signal from the 

YTO (via the 

 Coupler/Isolator/Amplifier and 

 

 

 LPF).

When the YTO Loop is phase locked, the mixing product of the Nth harmonic of the M/N IN
signal and the RF INPUT signal is precisely equal to the 

 IN signal from the A10 

Synthesizer.

The IF Preamplifier consists of common-source amplifier Q4, common-emitter amplifier 
and feedback divider 

0

 gain provided is approximately 14 

The AllUl Sampler output, after being amplified, is buffered by emitter-follower Q7 and
applied to a 70 MHz low-pass filter. This filtering is done to remove any unwanted mixing

products produced by the mixing action of the sampler.

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