Intel Pentium Mobile T2080 LF80539GE0301M データシート
製品コード
LF80539GE0301M
Datasheet
69
Thermal Specifications and Design Considerations
potential activation of processor core clock modulation via the Thermal Monitor. The
digital thermal sensor is only valid while the processor is in the normal operating state
(C0 state).
Unlike traditional thermal devices, the Digital Thermal sensor will output a temperature
relative to the maximum supported operating temperature of the processor (T
J,MAX
). It
is the responsibility of software to convert the relative temperature to an absolute
temperature. The temperature returned by the digital thermal sensor will always be at
or below T
J,MAX
. Over temperature conditions are detectable via an Out Of Spec status
bit. This bit is also part of the Digital Thermal sensor MSR. When this bit is set, the
processor is operating out of specification and immediate shutdown of the system
should occur. The processor operation and code execution is not guaranteed once the
activation of the Out of Spec status bit is set.
The Digital Thermal Sensor (DTS) relative temperature readout corresponds to the
Intel Thermal Monitor (TM1/TM2) trigger point. When the DTS indicates maximum
processor core temperature has been reached the TM1 or TM2 hardware thermal
control mechanism will activate. The DTS and TM1/TM2 temperature may not
correspond to the thermal diode reading since the thermal diode is located in a
separate portion of the die and thermal gradient between the individual core DTS.
Additionally, the thermal gradient from DTS to thermal diode can vary substantially due
to changes in processor power, mechanical and thermal attach and software
application. The system designer is required to use the DTS to guarantee proper
operation of the processor within its temperature operating specifications.
Changes to the temperature can be detected via two programmable thresholds located
in the processor MSRs. These thresholds have the capability of generating interrupts
via the core's local APIC. Refer to the Intel® Architecture Software Developer's Manual
for specific register and programming details
5.1.5
Out of Specification Detection
Overheat detection is performed by monitoring the processor temperature and
temperature gradient. This feature is intended for graceful shut down before the
THERMTRIP# is activated. If the processor’s TM1 or TM2 are triggered and the
temperature remains high, an “Out Of Spec” status and sticky bit are latched in the
status MSR register and generates thermal interrupt. PROCHOT# Signal Pin.
An external signal, PROCHOT# (processor hot), is asserted when the processor die
temperature has reached its maximum operating temperature. If the Intel Thermal
Monitor 1 or Intel Thermal Monitor 2 is enabled (note that the Thermal Monitor 1 or
Thermal Monitor 2 must be enabled for the processor to be operating within
specification), the TCC will be active when PROCHOT# is asserted. The processor can
be configured to generate an interrupt upon the assertion or deassertion of
PROCHOT#.
The processor implement a bi-directional PROCHOT# capability to allow system designs
to protect various components from over-temperature situations. The PROCHOT#
signal is bi-directional in that it can either signal when the processor has reached its
maximum operating temperature or be driven from an external source to activate the
TCC. The ability to activate the TCC via PROCHOT# can provide a means for thermal
protection of system components.
In a dual-core implementation, only a single PROCHOT# pin exists at a package level.
When either core's thermal sensor trips, PROCHOT# signal will be driven by the
processor package. If only TM1 is enabled, PROCHOT# will be asserted and only the
core that is above TCC temperature trip point will have its core clocks modulated. If
TM2 is enabled, then regardless of which core(s) are above TCC temperature trip point,
both cores will enter the lowest programmed TM2 performance state.