Infineon DDR3 2GB Memory Module IMSH2GU13A1F1C-10F ユーザーズマニュアル
製品コード
IMSH2GU13A1F1C-10F
IMSH[1G/2G][U/E]x3A1F1C(T)
DDR3 Unbuffered DIMM
Advance Internet Data Sheet
Rev. 0.65, 2008-12
6
03052008-R2G5-2FN2
2
Configuration
2.1
Pin Configuration
TABLE 4
Pin Configuration of DDR3 UDIMM - 240 Pins
Pin Name
EDA
Signal
Name
Signal
Name
1)
Pin No.
Pin
Type
Type
Buffer
Type
Type
Function
Clock Signals
CK0
ck0_t
184
I
SSTL
Clock Inputs [1:0] and Differential Clock Inputs [1:0]
CK0
ck0_c
185
I
SSTL
CK1
ck1_t
63
I
SSTL
CK1
ck1_c
64
I
SSTL
Control Signals
CKE0
cke0
50
I
SSTL
Clock Enable [1:0]
CKE1
cke1
169
I
SSTL
ODT0
odt0
195
I
SSTL
On-Die Termination [1:0]
ODT1
odt1
77
I
SSTL
S0
s0_n
193
I
SSTL
Chip Select [1:0]
S1/NC
s1_n
76
I
SSTL
Command Signals
RAS
ras_n
192
I
SSTL
Row Address Strobe
CAS
cas_n
74
I
SSTL
Column Address Strobe
WE
we_n
73
I
SSTL
Write Enable
Bank Address Signals
BA0
ba0
71
I
SSTL
Bank Address Bus[2:0]
BA1
ba1
190
I
SSTL
BA2
ba2
52
I
SSTL
Address Signals
A0
a0
188
I
SSTL
Address Bus [15:0]
A1
a1
181
I
SSTL
A2
a2
61
I
SSTL
A3
a3
180
I
SSTL
A4
a4
59
I
SSTL
A5
a5
58
I
SSTL