Intel PCI-X ユーザーズマニュアル
Software Developer’s Manual
287
Register Descriptions
Table 13-61. Mode Encodings for LED Outputs
1
Mode
Pneumonic
State / Event Indicated
0000b
LINK_10/1000
Asserted when either 10 or 1000 Mbps link is
established and maintained.
established and maintained.
0001b
LINK_100/1000
Asserted when either 100 or 1000 Mbps link is
established and maintained.
established and maintained.
0010b
LINK_UP
Asserted when any speed link is established and
maintained.
maintained.
0011b
ACTIVITY
Asserted when link is established and packets are
being transmitted or receive activity that passes
filtering.
being transmitted or receive activity that passes
filtering.
0100b
LINK/ACTIVITY
Asserted when link is established and when there is
no transmit or receive activity that passes filtering.
no transmit or receive activity that passes filtering.
0101b
LINK_10
Asserted when a 10 Mbps link is established and
maintained.
maintained.
0110b
LINK_100
Asserted when a 100 Mbps link is established and
maintained.
maintained.
0111b
LINK_1000
Asserted when a 1000 Mbps link is established and
maintained.
maintained.
1000b
PCIX_MODE
Asserted when Ethernet controller is in PCI-X mode
(deasserted in PCI mode).
(deasserted in PCI mode).
1001b
FULL_DUPLEX
Asserted when the link is configured for full duplex
operation (deasserted in half-duplex).
operation (deasserted in half-duplex).
1010b
COLLISION
Asserted when a collision is observed.
1011b
BUS_SPEED
Asserted when the Ethernet controller is operating
in a PCI 66 MHz or a PCI-X 133 MHz configuration
(high-speed PCI operation), deasserted for 33 MHz
PCI and 66 MHz PCI-X (as determined by pins
sampled at PCI reset).
in a PCI 66 MHz or a PCI-X 133 MHz configuration
(high-speed PCI operation), deasserted for 33 MHz
PCI and 66 MHz PCI-X (as determined by pins
sampled at PCI reset).
1100b
BUS_SIZE
Reserved for the
82547GI/EI only)
Reserved for the
82547GI/EI only)
Asserted when the Ethernet controller is operating
as a 64-bit PCI or PCI-X device, deasserted for 32-
bit configuration.
as a 64-bit PCI or PCI-X device, deasserted for 32-
bit configuration.
1101b
PAUSED
Asserted when the Ethernet controller’s transmitter
is flow controlled.
is flow controlled.
1110b
VCC/LED_ON
Always high. Assuming no optional inversion
selected, causes output pin high / LED ON for
typical LED circuit.
selected, causes output pin high / LED ON for
typical LED circuit.
1.
Not applicable to the 82544GC/EI.