Renesas R5S72642 ユーザーズマニュアル
Section 10 Direct Memory Access Controller
R01UH0134EJ0400 Rev. 4.00
Page 383 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Channel Register
Name
Abbreviation R/W Initial
Value Address
Access
Size
Size
Common DMA operation register DMAOR
R/W*
2
H'0000 H'FFFE1200
8,
16
0 and 1
DMA extension
resource selector 0
resource selector 0
DMARS0 R/W
H'0000 H'FFFE1300
16
2 and 3
DMA extension
resource selector 1
resource selector 1
DMARS1 R/W
H'0000 H'FFFE1304
16
4 and 5
DMA extension
resource selector 2
resource selector 2
DMARS2 R/W
H'0000 H'FFFE1308
16
6 and 7
DMA extension
resource selector 3
resource selector 3
DMARS3 R/W
H'0000 H'FFFE130C
16
8 and 9
DMA extension
resource selector 4
resource selector 4
DMARS4 R/W
H'0000 H'FFFE1310
16
10 and 11 DMA extension
resource selector 5
DMARS5 R/W
H'0000 H'FFFE1314
16
12 and 13 DMA extension
resource selector 6
DMARS6 R/W
H'0000 H'FFFE1318
16
14 and 15 DMA extension
resource selector 7
DMARS7 R/W
H'0000 H'FFFE131C
16
Notes: 1. For the HE and TE bits in CHCR_n, only 0 can be written to clear the flags after 1 is
read.
2. For the AE and NMIF bits in DMAOR, only 0 can be written to clear the flags after 1 is
read.