Renesas R5S72642 ユーザーズマニュアル
Section 17 I
2
C Bus Interface 3
R01UH0134EJ0400 Rev. 4.00
Page 857 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W
Value R/W
Description
5
SDAO
1
R/W
SDA Output Value Control
This bit is used with SDAOP when modifying output
level of SDA. This bit should not be manipulated during
transfer.
level of SDA. This bit should not be manipulated during
transfer.
0: When reading, SDA pin outputs low.
When writing, SDA pin is changed to output low.
1: When reading, SDA pin outputs high.
When writing, SDA pin is changed to output Hi-Z
(outputs high by external pull-up resistance).
4
SDAOP
1
R/W
SDAO Write Protect
Controls change of output level of the SDA pin by
modifying the SDAO bit. To change the output level,
clear SDAO and SDAOP to 0 or set SDAO to 1 and
clear SDAOP to 0. This bit is always read as 1.
modifying the SDAO bit. To change the output level,
clear SDAO and SDAOP to 0 or set SDAO to 1 and
clear SDAOP to 0. This bit is always read as 1.
3
SCLO
1
R
SCL Output Level
Monitors SCL output level. When SCLO is 1, SCL pin
outputs high. When SCLO is 0, SCL pin outputs low.
outputs high. When SCLO is 0, SCL pin outputs low.
2
1
R
Reserved
This bit is always read as 1. The write value should
always be 1.
always be 1.
1
IICRST
0
R/W
Control Part Reset
Resets bits BC[2:0] in ICMR and internal circuits. If this
bit is set to 1 when hang-up occurs because of
communication failure during I
bit is set to 1 when hang-up occurs because of
communication failure during I
2
C bus operation, bits
BC[2:0] in ICMR and internal circuits can be reset.
0
1
R
Reserved
This bit is always read as 1. The write value should
always be 1.
always be 1.