Renesas R5S72621 ユーザーズマニュアル
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Section 33 Power-Down Modes
Page 1804 of 2108
R01UH0134EJ0400 Rev. 4.00
Sep
24,
2014
SH7262 Group, SH7264 Group
Bit Bit
Name
Initial
Value R/W Description
Value R/W Description
9 PG10F
0 R/(W)* PG10 Flag
0: No change on the PG10 pin
1: Change on the PG10 pin
Note: For 1-Mbyte version, this bit is reserved and
always read as 0. The write value should
always be 0.
always be 0.
8 NMIF 0 R/(W)* NMI Flag
0: No interrupt on NMI pin
1: Interrupt on NMI pin
7
0
R
Reserved
This bit is always read as 0. The write value should
always be 0.
always be 0.
6 RTCARF
0 R/(W)* RTCAR Flag
0: No realtime clock alarm interrupt generated
1: Realtime clock alarm Interrupt generated
5 PC8F 0 R/(W)* PC8 Flag
0: No change on the PC8 pin
1: Change on the PC8 pin
4 PC7F 0 R/(W)* PC7 Flag
0: No change on the PC7 pin
1: Change on the PC7 pin
3 PC6F 0 R/(W)* PC6 Flag
0: No change on the PC6 pin
1: Change on the PC6 pin
2 PC5F 0 R/(W)* PC5 Flag
0: No change on the PC5 pin
1: Change on the PC5 pin
1 PJ3F 0 R/(W)* PJ3 Flag
0: No change on the PJ3 pin
1: Change on the PJ3 pin
0 PJ1F 0 R/(W)* PJ1 Flag
0: No change on the PJ1 pin
1: Change on the PJ1 pin
Note: * Only 0 can be written after reading 1 to clear the flag.