Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 データシート
製品コード
P4X-UPE3210-316-6M1333
Datasheet
103
DRAM Controller Registers (D0:F0)
5.2.4
C0DRB2—Channel 0 DRAM Rank Boundary Address 2
B/D/F/Type:
0/0/0/MCHBAR
Address Offset: 204–205h
Default Value:
0000h
Access:
RW/L, RO
Size:
16 bits
See C0DRB0 register.
5.2.5
C0DRB3—Channel 0 DRAM Rank Boundary Address 3
B/D/F/Type:
0/0/0/MCHBAR
Address Offset: 206–207h
Default Value:
0000h
Access:
RO, RW/L
Size:
16 bits
See C0DRB0 register.
Bit
Access
Default
Value
Description
15:10
RO
000000b Reserved
9:0
RW/L
000h
Channel 0 DRAM Rank Boundary Address 2 (C0DRBA2): This register
defines the DRAM rank boundary for rank2 of Channel 0 (64 MB granularity)
=(R2 + R1 + R0)
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.
defines the DRAM rank boundary for rank2 of Channel 0 (64 MB granularity)
=(R2 + R1 + R0)
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.
Bit
Access
Default
Value
Description
15:10
RO
000000b Reserved
9:0
RW/L
000h
Channel 0 DRAM Rank Boundary Address 3 (C0DRBA3): This register
defines the DRAM rank boundary for rank3 of Channel 0 (64 MB granularity)
=(R3 + R2 + R1 + R0)
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.
defines the DRAM rank boundary for rank3 of Channel 0 (64 MB granularity)
=(R3 + R2 + R1 + R0)
R0 = Total rank0 memory size/64MB
R1 = Total rank1 memory size/64MB
R2 = Total rank2 memory size/64MB
R3 = Total rank3 memory size/64MB
This register is locked by ME stolen Memory lock.