Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 データシート

製品コード
P4X-UPE3210-316-6M1333
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Datasheet
265
Direct Media Interface (DMI) RCRB
9.9
DMIVC1RSTS—DMI VC1 Resource Status
B/D/F/Type:
0/0/0/DMIBAR
Address Offset: 26–27h
Default Value:
0002h
Access:
RO 
Size:
16 bits
This register reports the Virtual Channel specific status.
9.10
DMILCAP—DMI Link Capabilities
B/D/F/Type:
0/0/0/DMIBAR
Address Offset: 84–87h
Default Value:
00012C41h
Access:
RO, RWO 
Size:
32 bits
This register indicates DMI specific capabilities.
Bit
Access
Default 
Value
Description
15:2
RO
0000h
Reserved 
1
RO
1b
Virtual Channel 1 Negotiation Pending (VC1NP): 
0 = The VC negotiation is complete.
1 = The VC resource is still in the process of negotiation (initialization or 
disabling).
0
RO
0b
Reserved 
Bit
Access
Default 
Value
Description
31:18
RO
0000h
Reserved 
17:15
RWO
010b
L1 Exit Latency (L1SELAT): This field indicates the length of time this Port 
requires to complete the transition from L1 to L0. 
010 = 2 µs to less than 4 µs
All other encodings are reserved.
14:12
RWO
010b
L0s Exit Latency (L0SELAT): This field indicates the length of time this Port 
requires to complete the transition from L0s to L0. 
010 = 128 ns to less than 256 ns
All other encodings are reserved.
11:10
RO
11b
Active State Link PM Support (ASLPMS): L0s & L1 entry supported.
9:4
RO
04h
Max Link Width (MLW): This field indicates the maximum number of lanes 
supported for this link.
04h = x4
All other encodings are reserved.
3:0
RO
1h
Max Link Speed (MLS): Hardwired to indicate 2.5 Gb/s.