Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 データシート

製品コード

P4X-UPE3210-316-6M1333

Datasheet

Contents

Introduction ............................................................................................................ 15
1.1

Terminology ..................................................................................................... 17

1.2

MCH Overview .................................................................................................. 20
1.2.1

Host Interface........................................................................................ 20

1.2.2

System Memory Interface ....................................................................... 20

1.2.3

Direct Media Interface (DMI).................................................................... 21

1.2.4

PCI Express* Interface............................................................................ 22

1.2.5

MCH Clocking ........................................................................................ 23

1.2.6

Power Management ................................................................................ 23

1.2.7

Thermal Sensor ..................................................................................... 23

Signal Description ................................................................................................... 25
2.1

Host Interface Signals........................................................................................ 26

2.2

System Memory (DDR2) Interface Signals ............................................................ 29
2.2.1

System Memory Channel A Interface Signals.............................................. 29

2.2.2

System Memory Channel B Interface Signals.............................................. 30

2.2.3

System Memory Miscellaneous Signals ...................................................... 31

2.3

PCI Express* Interface Signals............................................................................ 31

2.4

Controller Link Interface Signals.......................................................................... 32

2.5

Clocks, Reset, and Miscellaneous ......................................................................... 32

2.6

Direct Media Interface........................................................................................ 33

2.7

Power and Grounds ........................................................................................... 34

System Address Map ............................................................................................... 35
3.1

Legacy Address Range ....................................................................................... 38
3.1.1

DOS Range (0h – 9_FFFFh) ..................................................................... 38

3.1.2

Expansion Area (C_0000h-D_FFFFh) ......................................................... 39

3.1.3

Extended System BIOS Area (E_0000h–E_FFFFh)....................................... 39

3.1.4

System BIOS Area (F_0000h–F_FFFFh) ..................................................... 40

3.1.5

PAM Memory Area Details........................................................................ 40

3.2

Main Memory Address Range (1MB – TOLUD)........................................................ 40
3.2.1

ISA Hole (15 MB –16 MB)........................................................................ 41

3.2.2

TSEG .................................................................................................... 42

3.2.3

Pre-allocated Memory ............................................................................. 42

3.3

PCI Memory Address Range (TOLUD – 4 GB) ........................................................ 43
3.3.1

APIC Configuration Space (FEC0_0000h–FECF_FFFFh)................................. 45

3.3.2

HSEG (FEDA_0000h–FEDB_FFFFh) ........................................................... 45

3.3.3

FSB Interrupt Memory Space (FEE0_0000–FEEF_FFFF)................................ 45

3.3.4

High BIOS Area...................................................................................... 45

3.4

Main Memory Address Space (4 GB to TOUUD)...................................................... 46
3.4.1

Memory Re-claim Background .................................................................. 47

3.4.2

Memory Reclaiming ................................................................................ 47

3.5

PCI Express* Configuration Address Space ........................................................... 47

3.6

PCI Express* Address Space ............................................................................... 48

3.7

System Management Mode (SMM) ....................................................................... 49
3.7.1

SMM Space Definition ............................................................................. 49

3.7.2

SMM Space Restrictions .......................................................................... 50

3.7.3

SMM Space Combinations........................................................................ 50

3.7.4

SMM Control Combinations ...................................................................... 51

3.7.5

SMM Space Decode and Transaction Handling ............................................ 51

3.7.6

Processor WB Transaction to an Enabled SMM Address Space....................... 51