Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 データシート
製品コード
P4X-UPE3210-316-6M1333
Datasheet
31
Signal Description
2.2.3
System Memory Miscellaneous Signals
2.3
PCI Express* Interface Signals
Signal Name
Type
Description
DDR_RCOMPXPD
I/O
A
System Memory Pull-down RCOMP
DDR_RCOMPXPU
I/O
A
System Memory Pull-up RCOMP
DDR_RCOMPYPD
I/O
A
System Memory Pull-down RCOMP
DDR_RCOMPYPU
I/O
A
System Memory Pull-up RCOMP
DDR_VREF
I
A
System Memory Reference Voltage
DDR_RCOMPVOH
I
A
System Memory Pull-up Reference Signal
DDR_RCOMPVOL
I
A
System Memory Pull-down Reference Signal
Signal Name
Type
Description
PEG_RXN_[15:0]
PEG_RXP_[15:0]
PEG_RXP_[15:0]
I/O
PCIE
Primary PCI Express Receive Differential Pair
For the 3200 MCH, a maximum width of x8 is supported. The
upper 8 lanes are used for static lane reversal. This also applies to
the 3210 MCH in dual x8 mode.
For the 3210 MCH in single x16 mode, the MCH supports a
maximum width of x16 where all lanes are used.
For the 3200 MCH, a maximum width of x8 is supported. The
upper 8 lanes are used for static lane reversal. This also applies to
the 3210 MCH in dual x8 mode.
For the 3210 MCH in single x16 mode, the MCH supports a
maximum width of x16 where all lanes are used.
PEG_TXN_[15:0]
PEG_TXP_[15:0]
PEG_TXP_[15:0]
O
PCIE
Primary PCI Express Transmit Differential Pair
For the 3200 MCH, a maximum width of x8 is supported. The
upper 8 lanes are used for static lane reversal. This also applies to
the 3210 MCH in dual x8 mode.
For the 3210 MCH in single x16 mode, the MCH supports a
maximum width of x16 where all lanes are used.
For the 3200 MCH, a maximum width of x8 is supported. The
upper 8 lanes are used for static lane reversal. This also applies to
the 3210 MCH in dual x8 mode.
For the 3210 MCH in single x16 mode, the MCH supports a
maximum width of x16 where all lanes are used.
PEG2_RXN_[15:0]
PEG2_RXP_[15:0]
(3210 MCH only)
PEG2_RXP_[15:0]
(3210 MCH only)
I/O
PCIE
Secondary PCI Express Receive Differential Pair
Note: When using the 3210 MCH in dual x8 mode, the MCH
supports a maximum width of x8. The upper 8 lanes are used for
static lane reversal.
For the 3200 MCH, these signals are No Connects.
Note: When using the 3210 MCH in dual x8 mode, the MCH
supports a maximum width of x8. The upper 8 lanes are used for
static lane reversal.
For the 3200 MCH, these signals are No Connects.
PEG2_TXN_[15:0]
PEG2_TXP_[15:0]
(3210 MCH only)
PEG2_TXP_[15:0]
(3210 MCH only)
O
PCIE
Secondary PCI Express Transmit Differential Pair
Note: When using the 3210 MCH in dual x8 mode, the MCH
supports a maximum width of x8. The upper 8 lanes are used for
static lane reversal.
For the 3200 MCH, these signals are No Connects.
Note: When using the 3210 MCH in dual x8 mode, the MCH
supports a maximum width of x8. The upper 8 lanes are used for
static lane reversal.
For the 3200 MCH, these signals are No Connects.
EXP_COMPO
I
A
Primary PCI Express Output Current Compensation