Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 データシート

Datasheet

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The following are examples of Memory Mapped IO devices are typically located below 

4 GB:

• High  BIOS 
• HSEG
• TSEG
• XAPIC
• Local  APIC
• FSB Interrupts
• Mbase/Mlimit
• Memory Mapped IO space that supports only 32 B addressing

The MCH provides the capability to re-claim the physical memory overlapped by the 

Memory Mapped I/O logical address space. The MCH re-maps physical memory from 

the Top of Low Memory (TOLUD) boundary up to the 4 GB boundary to an equivalent 

sized logical address range located just below the Intel ME's stolen memory. 

An incoming address (referred to as a logical address) is checked to see if it falls in the 

memory re-map window. The bottom of the re-map window is defined by the value in 

the RECLAIMBASE register. The top of the re-map window is defined by the value in the 

RECLAIMLIMIT register. An address that falls within this window is reclaimed to the 

physical memory starting at the address defined by the TOLUD register. The TOLUD 

register must be 64M aligned when RECLAIM is enabled, but can be 1M aligned when 

reclaim is disabled.

There is a device 0 register, PCIEXBAR, which defines the base address for the 

configuration space associated with all devices and functions that are potentially a part 

of the PCI Express root complex hierarchy. The size of this range will be programmable 

for the MCH. BIOS must assign this address range such that it will not conflict with any 

other address ranges.

See the configuration portion of this document for more details.