Renesas R5S72643 ユーザーズマニュアル
Section 11 Multi-Function Timer Pulse Unit 2
R01UH0134EJ0400 Rev. 4.00
Page 473 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
TSR2_0
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
1
1
0
0
0
0
0
0
R
R
R
R
R
R
Note:
Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
R/(W)*
1
R/(W)*
1
1.
-
-
-
-
-
-
TGFF
TGFE
Bit Bit
Name
Initial
Value
Value
R/W Description
7, 6
All
1
R
Reserved
These bits are always read as 1. The write value
should always be 1.
should always be 1.
5 to 2
All
0
R
Reserved
These bits are always read as 0. The write value
should always be 0.
should always be 0.
1 TGFF 0 R/(W)*
1
Compare Match Flag F
Status flag that indicates the occurrence of compare
match between TCNT_0 and TGRF_0.
match between TCNT_0 and TGRF_0.
[Clearing condition]
When 0 is written to TGFF after reading
TGFF = 1*
2
[Setting condition]
When TCNT_0 = TGRF_0 and TGRF_0 is
functioning as compare register
0 TGFE 0 R/(W)*
1
Compare Match Flag E
Status flag that indicates the occurrence of compare
match between TCNT_0 and TGRE_0.
match between TCNT_0 and TGRE_0.
[Clearing condition]
When 0 is written to TGFE after reading
TGFE = 1*
2
[Setting condition]
When TCNT_0 = TGRE_0 and TGRE_0 is
functioning as compare register
Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag.
2. If the next flag is set before TGFA is cleared to 0 after reading TGFA = 1, TGFA
remains 1 even when 0 is written to. In this case, read TGFA = 1 again to clear TGFA to
0.
0.