Intel MFS5520VI ユーザーズマニュアル

Functional Architecture 

Intel® Compute Module MFS5520VI TPS  

 Revision 

1.3 

Intel order number: E64311-005 

6 

 

3.  Functional Architecture 

The architecture and design of the Intel

®

 Compute Module MFS5520VI is based on the Intel

®

 

5520 Chipset I/O Hub (IOH) and the Intel

®

 82801JR ICH10 RAID. The chipset is designed for 

systems based on the Intel

®

 Xeon

®

 Processor in FC-LGA 1366 socket B package with Intel

®

 

QuickPath Interconnect (Intel

®

 QPI). The chipset contains two main components:  

ƒ

 

Intel

®

 5520 Chipset I/O Hub (IOH) that provides a connection point between various I/O 

components. 

ƒ

 

Intel

®

 82801JR, which is the I/O controller hub (ICH10R) for the I/O subsystem.  

This chapter provides a high-level description of the functionality associated with each chipset 
component and the architectural blocks that make up the server board. 

 

 

Primary

Mid-Plane Connector

2

2

TPM

Opt - int in TB

2

4

SSI Compliant

Mezzanine

Flex IO 

Connector