Intel AT80604004872AA ユーザーズマニュアル

Intel® Xeon® Processor 7500 Datasheet, Volume 1

157

This location contains the sample/production field, which is a two-bit field and is LSB 
aligned. All Q-spec material will use a value of 00b. All S-spec material will use a value 
of 01b. All other values are reserved. Writes to this register have no effect.

Example: A processor with a Qxxx mark (engineering sample) will have offset 14h set 
to 00h. A processor with an Sxxxx mark (production unit) will use 01h at offset 14h.

This location contains information regarding the number of cores and threads 

on the processor. Writes to this register have no effect. Data format is binary.

Example: The Intel® Xeon® processor 7500 series has eight cores and two threads 
per core.

This location contains the system bus frequency information. Systems may need to 
read this offset to decide if all installed processors support the same system bus speed. 
The data provided is the speed, rounded to a whole number, and reflected in binary 
coded decimal. Writes to this register have no effect.

Example: A processor with system buss speed of 1.066GHz will have a value of 1066h.

This location is reserved. Writes to this register have no effect.

7:2

000000b-111111b: Reserved

1:0

Sample or Production indictor

00b: Sample

01b: Production

10b-11b: Reserved

7:2

Number of cores

1:0

Number of threads per core

15:0

0000h-FFFFh: MHz