Intel D425 AU80610006252AA ユーザーズマニュアル
製品コード
AU80610006252AA
Processor Configuration Registers
Datasheet
103
Register
Name
Register
Symbol
Register
Start
Register
End
Default
Value
Access
Class Code
CC
9
B
030000h
RO;
Cache Line
Size
Size
CLS C
C
00h
RO;
Master Latency
Timer
Timer
MLT2 D
D
00h
RO;
Header Type
HDR2
E
E
80h
RO;
Memory
Mapped Range
Address
Mapped Range
Address
MMADR 10
13
00000000h
RO;
RW;
I/O Base
Address
Address
IOBAR 14
17
00000001h
RO;
RW;
Graphics
Memory Range
Address
Memory Range
Address
GMADR 18
1B
00000008h
RO;
RW;
RW/L;
Graphics
Translation
Table Range
Address
Translation
Table Range
Address
GTTADR 1C
1F
00000000h
RO;
RW;
Subsystem
Vendor
Identification
Vendor
Identification
SVID2 2C
2D
0000h
RWO;
Subsystem
Identification
Identification
SID2 2E
2F
0000h
RWO;
Video BIOS
ROM Base
Address
ROM Base
Address
ROMADR 30
33
00000000h
RO;
Capabilities
Pointer
Pointer
CAPPOINT 34 34
90h
RO;
Interrupt Line
INTRLINE
3C
3C
00h
RW;
Interrupt Pin
INTRPIN
3D
3D
01h
RO;
Minimum
Grant
Grant
MINGNT 3E
3E
00h
RO;
Maximum
Latency
Latency
MAXLAT 3F
3F
00h
RO;
Mirror of
Device 0
Capability
Identifier
Device 0
Capability
Identifier
CAPID0 40
47
000000000
1080009h
1080009h
RO;
GMCH
Graphics
Control
Register
Graphics
Control
Register
MGGC 52
53
0030h
RO;
Device Enable
DEVEN
54
57
00000019h
RO;