Intel Xeon L3406 CM80616005010AA ユーザーズマニュアル
製品コード
CM80616005010AA
Processor Uncore Configuration Registers
234
Datasheet, Volume 2
4.9.6
MC_TEST_PH_CTR
Memory test Control Register
4.9.7
MC_TEST_PH_PIS
Memory test physical layer initialization status
Device:
3
Function:
4
Offset:
6Ch
Access as a DWord
Bit
Attr
Default
Description
31:11
RO
0
Reserved
10:8
RW
0
INIT_MODE
Initialization Mode
Initialization Mode
7:0
RO
0
Reserved
Device:
3
Function:
4
Offset:
80h
Access as a DWord
Bit
Attr
Default
Description
31:30
RO
0
Reserved
29
RO
0
GLOBAL_ERROR
Indication that an error was detected during a memory test.
Indication that an error was detected during a memory test.
28:0
RO
0
Reserved