Intel QX9775 EU80574XL088N データシート
製品コード
EU80574XL088N
Land Listing and Signal Description
74
Datasheet
NOTES:
1.
1.
For this processor land, the maximum number of symmetric agents is one. Maximum
number of priority agents is zero.
number of priority agents is zero.
2.
For this processor land, the maximum number of symmetric agents is two. Maximum
number of priority agents is zero.
number of priority agents is zero.
3.
For this processor land, the maximum number of symmetric agents is two. Maximum
number of priority agents is one.
number of priority agents is one.
§
VCC_DIE_SENSE
VCC_DIE_SENSE2
VCC_DIE_SENSE2
O
VCC_DIE_SENSE and VCC_DIE_SENSE2 provides an
isolated, low impedance connection to the processor core
power and ground. This signal should be connected to the
voltage regulator feedback signal, which insures the
output voltage (that is, processor voltage) remains within
specification.
isolated, low impedance connection to the processor core
power and ground. This signal should be connected to the
voltage regulator feedback signal, which insures the
output voltage (that is, processor voltage) remains within
specification.
VID[6:1]
O
VID[6:1] (Voltage ID) pins are used to support automatic
selection of power supply voltages (V
selection of power supply voltages (V
CC
). These are CMOS
signals that are driven by the processor and must be
pulled up through a resistor. Conversely, the voltage
regulator output must be disabled prior to the voltage
supply for these pins becomes invalid. The VID pins are
needed to support processor voltage specification
variations. See
pulled up through a resistor. Conversely, the voltage
regulator output must be disabled prior to the voltage
supply for these pins becomes invalid. The VID pins are
needed to support processor voltage specification
variations. See
for definitions of these pins. The
VR must supply the voltage that is requested by these
pins, or disable itself.
pins, or disable itself.
VID_SELECT
O
VID_SELECT is an output from the processor which
selects the appropriate VID table for the Voltage
Regulator. This signal is not connected to the processor
die. This signal is a no-connect on the processor package.
selects the appropriate VID table for the Voltage
Regulator. This signal is not connected to the processor
die. This signal is a no-connect on the processor package.
VSS_DIE_SENSE
VSS_DIE_SENSE2
VSS_DIE_SENSE2
O
VSS_DIE_SENSE and VSS_DIE_SENSE2 provides an
isolated, low impedance connection to the processor core
power and ground. This signal should be connected to the
voltage regulator feedback signal, which insures the
output voltage (that is, processor voltage) remains within
specification.
isolated, low impedance connection to the processor core
power and ground. This signal should be connected to the
voltage regulator feedback signal, which insures the
output voltage (that is, processor voltage) remains within
specification.
VTT
P
The FSB termination voltage input pins. Refer to
for further details.
VTT_OUT
O
The VTT_OUT signals are included in order to provide a
local V
local V
TT
for some signals that require termination to V
TT
on the motherboard.
VTT_SEL
O
The VTT_SEL signal is used to select the correct V
TT
voltage level for the processor. VTT_SEL is connected to
VSS on the processor package.
VSS on the processor package.
Table 4-1.
Signal Definitions (Sheet 11 of 11)
Name
Type
Description
Notes