Intel SR1695GPRX1AC ユーザーズマニュアル
Power Sub-System
Intel® Server System SR1695GPRX TPS
Revision
1.5
Intel order number: G11332-006
24
Table 30. PWOK Signal Characteristics
Signal Type
Open collector/drain output from power supply. Pull-up to VSB
located in power supply.
DCOK = High
Power Good
DCOK = Low
Power Not Good
MIN
MAX
Logic level low voltage, Isink=4mA
0V
0.6V
Logic level high voltage, Isource=200
μA
3.0V
3.3V
Sink current, DCOK = low
4mA
Source current, DCOK = high
2mA
DCOK rise and fall time
100
μsec
3.4.4 LED
indicators
There is a green POWER LED (PWR). The LED shall be visible on the power supply’s exterior
face.
face.
The LED and its location shall meet ESD requirements required for the power supply.
The
LED shall be securely mounted in such a way that incidental pressure on the LED will not cause
it to become displaced.
it to become displaced.
Table 31. Power Supply Unit LED Indications
Power Supply LED
Power Supply Condition
Power LED (green)
No AC power to all PSU
OFF
No AC power to this PSU only
OFF
AC present / Standby Outputs On
OFF
Power supply DC outputs ON and OK
ON
Power supply failure
OFF
3.5 Protection
circuits
Protection circuits inside the power supply shall cause only the power supply’s main outputs to
shutdown.
shutdown.
The 5VSB output shall remain powered on if the failure does not involve this outputs.
When a protection circuit shuts down the power supply, green LED shall change to unlighted
status and the DC OK signal shall be asserted false.
status and the DC OK signal shall be asserted false.
If the power supply latches off due to a
protection circuit tripping, an AC cycle OFF for 15sec and a PSON
#
cycle HIGH for 1sec must
be able to reset the power supply.
3.5.1 Current
Limit
(OCP)
The power supply shall have current limit to prevent the +12V output from exceeding the values
shown in the table3.10 as below.
shown in the table3.10 as below.
The current limiting shall be of the constant current type. The
over current limit level shall be maintained for a period of 100 msec minimum and 300 msec
maximum. After this time the power supply shall latch off. The latch will be cleared by toggling
the PSON
maximum. After this time the power supply shall latch off. The latch will be cleared by toggling
the PSON
#
signal or by an AC power interruption. The power supply shall not be damaged from
repeated power cycling in this condition. The 5VSB shall be protected under over current or
shorted conditions but are not subject to the same constant current timing followed by
requirement to latch off.
shorted conditions but are not subject to the same constant current timing followed by
requirement to latch off.