Juniper CBL-M40-PWR-AU ユーザーズマニュアル

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This product includes the Envoy SNMP Engine, developed by Epilogue Technology, an Integrated Systems Company. Copyright © 1986–1997, Epilogue 
Technology Corporation. All rights reserved. This program and its documentation were developed at private expense, and no part of them is in the public 
domain.
This product includes memory allocation software developed by Mark Moraes, copyright © 1988, 1989, 1993, University of Toronto.
This product includes FreeBSD software developed by the University of California, Berkeley, and its contributors. All of the documentation and software 
included in the 4.4BSD and 4.4BSD-Lite Releases is copyrighted by The Regents of the University of California. Copyright © 1979, 1980, 1983, 1986, 1988, 
1989, 1991, 1992, 1993, 1994. The Regents of the University of California. All rights reserved.
GateD software copyright © 1995, The Regents of the University. All rights reserved. Gate Daemon was originated and developed through release 3.0 by 
Cornell University and its collaborators. Gated is based on Kirton’s EGP, UC Berkeley’s routing daemon (routed), and DCN’s HELLO routing protocol. 
Development of Gated has been supported in part by the National Science Foundation. Portions of the GateD software copyright © 1988, Regents of the 
University of California. All rights reserved. Portions of the GateD software copyright © 1991, D. L. S. Associates. 
This product includes software developed by Maker Communications, Inc., Copyright © 1996, 1997, Maker Communications, Inc.
Juniper Networks is registered in the U.S. Patent and Trademark Office and in other countries as a trademark of Juniper Networks, Inc. Broadband Cable 
Processor, ERX, ESP, G1, G10, G-series, Internet Processor, JUNOS, JUNOScript, M5, M10, M20, M40, M40e, M160, M-series, NMC-RX, SDX, ServiceGuard, 
T320, T640, T-series, UMC, and Unison are trademarks of Juniper Networks, Inc. All other trademarks, service marks, registered trademarks, or registered 
service marks are the property of their respective owners.
M40 Internet Router Hardware Guide
Copyright © 2003, Juniper Networks, Inc.
All rights reserved. Printed in USA.
Writer:Tony Mauro
Editor: Stella Hackell
Illustrations: Faith Bradford
Covers and template design: Edmonds Design
Revision History
30 June 2003—Applied new template, corrected problem report issues.
14 February 2003—Removed information about PC card.
7 October 2002—Added new component information and made minor edits.
12 March 2002—Changed book title and added PIC-related information.
15 October 2001—Added FPC installation caution and applied new templates.
15 January 2001—Added new information.
21 September 2000—Added new Routing Engine information.
12 April 2000—Made minor edits.
28 February 2000—Added information about Channelized OC-12 PIC and Fast Ethernet. Applied new templates and covers.
19 March 1999—Added updates about power supplies.
6 November 1998—Added more safety warnings and information about cabling DC power supplies. 
30 October 1998—Added DC power supply notices.
18 September 1998—First edition.
The information in this document is current as of the date listed in the revision history. 
Juniper Networks assumes no responsibility for any inaccuracies in this document. Juniper Networks reserves the right to change, modify, transfer or 
otherwise revise this publication without notice.
Products made or sold by Juniper Networks (including the G10 CMTS, M5, M10, M20, M40, M40e, and M160 routers, T320 router, T640 routing node, and 
the JUNOS software) or components thereof might be covered by one or more of the following patents that are owned by or licensed to Juniper Networks: 
U.S. Patent Nos. 5,473,599, 5,905,725, 5,909,440, 6,333,650, 6,359,479, and 6,406,312.
YEAR 2000 NOTICE
Juniper Networks hardware and software products are Year 2000 compliant. The JUNOS software has no known time-related limitations through the year 
2038. However, the NTP application is known to have some difficulty in the year 2036.