Abocom UTA128 ユーザーズマニュアル

requests 

 

Bus or self powered application (pin 
programmable) 

 

Onnow power management (D0, D2, D3) 
suspend mode compliance 

 

Pin programmable high/low power USB 
device registration, wake-up capability, USB 
device identification 

 

USB hot plug and play interface 

 

Control access and interrupt handling 
provided through the USB interface 

 

All FIFOS and FIFOS management needed 
in-cluded for USB/ISDN data processing 

 

Internal PLL to generate the USB 48MHz 
clock from a 15.36MHz crystal 

 

Internal regulator for 3.3V generation from 
USB bus 5V 

 

48 pin TQFP package 

 

0.35 micron HCMOS 6 process