Motorola MC68HC05RC8 ユーザーズマニュアル
Electrical Specifications
DC Electrical Characteristics (2.2 Vdc)
MC68HC05RC16 — Rev. 3.0
General Release Specification
MOTOROLA
Electrical Specifications
107
11.7 DC Electrical Characteristics (2.2 Vdc)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage
I
LOAD
= 10.0
µ
A
I
LOAD
= –10.0
µ
A
V
OL
V
OH
—
V
DD
– 0.1
—
—
—
0.1
—
V
Output High Voltage
(I
LOAD
–0.6 mA) Port A, Port B, Port C (1–7)
(I
LOAD
–8.0 mA) IRO
(I
LOAD
–1.2 mA) Port C (Bit 0)
V
OH
V
DD
– 0.3
V
DD
– 0.3
V
DD
– 0.3
V
DD
– 0.1
V
DD
– 0.1
V
DD
– 0.1
—
—
—
—
—
V
Output Low Voltage
(I
LOAD
= 1.0 mA) Port A, Port B, Port C (1–7)
(I
LOAD
= 8.0 mA) IRO
(I
LOAD
= 7.0 mA) Port C (Bit 0)
V
OL
—
—
—
—
—
0.1
0.1
0.1
0.1
0.1
0.3
0.3
0.3
0.3
0.3
V
Input High Voltage
Port A, Port B, Port C, IRQ, RESET, LPRST, OSC1
V
IH
0.7 x
V
DD
—
V
DD
V
Input Low Voltage
Port A, Port B, Port C, IRQ, RESET, LPRST, OSC1
V
IL
V
SS
—
0.4 x V
DD
V
Supply Current (see Notes)
Run
Wait
Stop
Wait
Stop
25
o
C
0 to +70
o
C
I
DD
—
—
—
—
—
—
0.3
0.15
0.1
0.1
0.1
1.0
0.3
0.3
1.0
4.0
4.0
mA
mA
mA
µ
A
µ
A
I/O Ports Hi-Z Leakage Current
Port A, Port B, Port C
I
OZ
–4
—
4
µ
A
Input Current
RESET, LPRST, IRQ, OSC1
RESET, LPRST, IRQ, OSC1
PB0–PB7 with Pullups Enabled
(V
IN
= 0.4 x V
DD
)
8
PB0–PB7 with Pullups Enabled
(V
IN
= 0.7 x V
DD
)
I
IN
–0.4
–25
–15
—
–50
–34
0.4
–105
–65
µ
A
Capacitance
Ports (as Input or Output)
RESET, LPRST, IRQ
RESET, LPRST, IRQ
C
OUT
C
INT
—
—
—
—
—
—
12
8
pF
NOTES:
1.
V
DD
= 2.2 Vdc
±
10%, V
SS
= 0 Vdc, T
A
= 0
°
C to +70
°
C, unless otherwise noted
2.
Typical values at midpoint of voltage range, 25
°
C only, represent average measurements.
3.
Wait I
DD
: only core timer active
4.
Run (Operating) I
DD
, wait I
DD
: Measured using external square wave clock source (f
O
sc
= 4.2 MHz); all inputs 0.2 V
from rail; no dc loads; less than 50 pF on all outputs; C
L
= 20 pF on OSC2
5.
Wait, Stop I
DD
: Port A and port C configured as inputs, port B configured as outputs, V
IL
= 0.2 V, V
IH
= V
DD
–0.2 V
6.
Stop I
DD
is measured with OSC1 = V
SS
.
7.
Wait I
DD
is affected linearly by the OSC2 capacitance.
8.
Pullups are designed to be capable of pulling to V
IH
within 25
µ
s for a 100 pF, 4-k
Ω
load.