Freescale Semiconductor MPC5200B ユーザーズマニュアル
MPC5200B Users Guide, Rev. 1
19-18
Freescale Semiconductor
Memory Map / Register Definition
19.5.17
MSCAN ID Acceptance Registers (CANIDAR0-7)—MBAR + 0x0920 / 0x09A0
Table 19-22. MSCAN ID Acceptance Registers (0 - 3)
msb 0
1
2
3
4
5
6
7 lsb
Adress Offset
0x920 / 0x9A0
CANIDR0
R
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
W
RESET:
0
0
0
0
0
0
0
0
msb 0
1
2
3
4
5
6
7 lsb
Adress Offset
0x921 / 0x9A1
CANIDR1
R
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
W
RESET:
0
0
0
0
0
0
0
0
msb 0
1
2
3
4
5
6
7 lsb
Adress Offset
0x924 / 0x9A4
CANIDR2
R
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
W
RESET:
0
0
0
0
0
0
0
0
msb 0
1
2
3
4
5
6
7 lsb
Adress Offset
0x925 / 0x9A5
CANIDR3
R
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
W
RESET:
0
0
0
0
0
0
0
0