Climax Technology Co Ltd ZBH-SA ユーザーズマニュアル

The 8051 CPU core used in the CC253x device family is a single-cycle 8051-compatible core. 

It has three different memory-access buses (SFR, DATA and CODE/XDATA) with single-cycle access 

to SFR, DATA, and the main SRAM. 

It also includes a debug interface and an 18-input extended interrupt unit. 

The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each 

of which is associated with one of four interrupt priorities. 

Any interrupt service request is serviced also when the device is in idle mode by going back to active 

mode. 

Some interrupts can also wake up the device from sleep mode (power modes 1–3). 

The memory arbiter is at the heart of the system, as it connects the CPU and DMA controller with the 

physical memories and all peripherals through the SFR bus. 

The memory arbiter has four memory access points, access of which can map to one of three physical 

memories: an 8-KB SRAM, flash memory, and XREG/SFR registers. 

It is responsible for performing arbitration and sequencing between simultaneous memory accesses to 

the same physical memory. 

The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. 

The 8-KB SRAM is an ultralow-power SRAM that retains its contents even when the digital part is 

powered off (power modes 2 and 3). 

This is an important feature for low-power applications. 

The 32/64/128/256 KB flash block provides in-circuit programmable non-volatile program memory for 

the device, and maps into the CODE and XDATA memory spaces. 

In addition to holding program code and constants, the non-volatile memory allows the application to 

save data that must be preserved such that it is available after restarting the device. 

Using this feature one can, e.g., use saved network-specific data to avoid the need for a full start-up 

and network find-and-join process . 

The digital core and peripherals are powered by a 1.8-V low-dropout voltage regulator. It provides 

power management functionality that enables low power operation for long battery life using different 

power modes. 

Five different reset sources exist to reset the device. 

The CC2530 includes many different peripherals that allow the application designer to develop 

advanced applications. 

The debug interface implements a proprietary two-wire serial interface that is used for in-circuit 

debugging. 

Through this debug interface, it is possible to perform an erasure of the entire flash memory, control 

which oscillators are enabled, stop and start execution of the user program, execute supplied 

instructions on the 8051 core, set code breakpoints, and single-step through instructions in the code. 

Using these techniques, it is possible to perform in-circuit debugging and external flash programming 

elegantly.