Computime Limited CT-EM2606 ユーザーズマニュアル
CT-EM2606 ZigBee Ready RF Transceiver Modules
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13. SIF Module Programming and Debug Interface
SIF is a synchronous serial interface developed by Cambridge Consultants Ltd. It is the
primary programming and debug interface of the CT-260. The SIF module allows external
devices to read and write memory-mapped registers in real-time without changing the
functionality or timing of the XAP2b core.
primary programming and debug interface of the CT-260. The SIF module allows external
devices to read and write memory-mapped registers in real-time without changing the
functionality or timing of the XAP2b core.
The SIF interface provides the following:
IC production test (especially analog)
PCB production test
Firmware
download
Product control and characterization
The pins are:
SIF_LOADB
SIF_CLK
SIF_MOSI
SIF_MISO
The maximum serial shift speed for the SIF interface is 48MHz. SIF interface accesses
can be initiated even when the chip is in idle, deep sleep or power down modes. An edge
on nSIF_LOAD wakes the chip to allow SIF cycles.
can be initiated even when the chip is in idle, deep sleep or power down modes. An edge
on nSIF_LOAD wakes the chip to allow SIF cycles.
14. Power Management
The module supports four different power modes: active, idle, deep sleep, and power
down.
down.
Active mode is the normal, operating state of the module.
While in idle mode, code execution halts until any interrupt occurs. All modules including
the radio continue to operate normally. The EmberZNet stack automatically invokes idle
as appropriate.
the radio continue to operate normally. The EmberZNet stack automatically invokes idle
as appropriate.
Deep sleep mode and power down mode both power off most of the functions, including
the radio, and leave only the critical chip functions powered. The internal regulator is
disabled. All output signals are maintained in a frozen state. Upon waking from deep
sleep or power down mode, the internal regulator is re_enabled. Deep sleep and power
down result in the same sleep current consumption. The two sleep modes differ as
follows: the module can wake on both an internal timer and an external signal from deep
sleep mode; power down mode can only wake on an external signal.
the radio, and leave only the critical chip functions powered. The internal regulator is
disabled. All output signals are maintained in a frozen state. Upon waking from deep
sleep or power down mode, the internal regulator is re_enabled. Deep sleep and power
down result in the same sleep current consumption. The two sleep modes differ as
follows: the module can wake on both an internal timer and an external signal from deep
sleep mode; power down mode can only wake on an external signal.