Intel S1400SP2 DBS1400SP2 ユーザーズマニュアル
製品コード
DBS1400SP2
Glossary
Intel® Server Board S1400SP TPS
Revision 1.0
Intel order number G64248-001
148
Term
Definition
ROM
Read-only memory
RTC
Real-time clock
SCI
System Control Interrupt. A system interrupt used by hardware to notify the operating system of ACPI
events.
events.
SDR
Sensor data record
SDRAM
Synchronous dynamic random access memory
SEL
System event log
SHA1
Secure Hash Algorithm 1
SIO
Server Input/Output
SMBus*
A two-wire interface based on the I
2
C protocol. The SMBus* is a low-speed bus that provides positive
addressing for devices and bus arbitration.
SMI
Server management interrupt. SMI is the highest priority non-maskable interrupt.
SMM
Server management mode
SMS
Server management software
SNMP
Simple Network Management Protocol
SOL
Serial-over-LAN
SPT
Straight pass-through
SRAM
Static random access memory
UART
Universal asynchronous receiver and transmitter
UDP
User Datagram Protocol
UHCI
Universal Host Controller Interface
VLAN
Virtual local area network