Dataram DTM68104A ユーザーズマニュアル

 

© 2014 

 

 

 
 
 
 

288-pin JEDEC-compliant DIMM, 133.35 mm wide by 31.25 mm 
high 

 

 
 

DTM68104A  1Gx64 
8G 2Rx8 PC4-2133P-UB0-10 
 
Performance range 
Clock / Module Speed / CL-t

 -t

 

1067 MHz / PC4-2133 / 16-16-16 
1067 MHz / PC4-2133 / 15-15-15 
933 MHz / PC4-1866 / 14-14-14 
933 MHz / PC4-1866 / 13-13-13 
800 MHz / PC4-1600 / 12-12-12 
800 MHz / PC4-1600 / 11-11-11 
667 MHz / PC4-1600 / 10-10-10 
667 MHz / PC4-1600 / 9-9-9

 

 

DTM68104A is an unbuffered 1Gx64 
memory module, which conforms to 
JEDEC's DDR4-2133, PC4-2133 standard. 
The assembly is Dual-Rank. Each rank is 
comprised of eight Samsung 512Mx8 
DDR4-2133 SDRAMs. One 4K-bit 
EEPROM is used for Serial Presence 
Detect. 
Both output driver strength and input 
termination impedance are programmable 
to maintain signal integrity on the I/O 
signals in a Fly-by topology.  A thermal 
sensor accurately monitors the DIMM 
module and can prevent exceeding the 
maximum operating temperature of 95C.

  

 
 

Operating Voltage: VDD/VDDQ  = 1.2V (1.14V to 1.26V)  

 
 
 

VPP = 2.5V (2.375V to 2.75V) 
VDDSPD = 2.25V to 2.75V 
I/O Type: 1.2 V signaling 

 

On-board I

2

C temperature sensor with integrated Serial 

Presence-Detect (SPD) EEPROM 

 

Data Transfer Rate: 17.0 Gigabytes/sec 

 

Data Bursts: 8 and burst chop 4 mode 

 

ZQ Calibration for Output Driver and On-Die Termination (ODT)  

 

Programmable ODT / Dynamic ODT during Writes 

 

Programmable CAS Latency: 9, 10, 11, 12, 13, 14, 15 and 16 

 

Bi-directional Differential Data Strobe signals 

 

Per DRAM Addressability is supported 
Write CRC is supported at all speed grades 
DBI (Data Bus Inversion) is supported(x8 only) 
CA parity (Command/Address Parity) mode is supported 
Supports ECC error correction and detection 
16 internal banks 
SDRAM Addressing (Row/Col/BG/BA): 15/10/2/2 

 

Fully RoHS Compliant