Intel SR1640TH SR1640THNA ユーザーズマニュアル

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SR1640THNA
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Functional Architecture 
Intel® Server System SR1640TH TPS 
  
Revision 
1.0 
Intel order number: E94847-001 
18 
ARM926EJ-S
16K D  &  I 
Cache
Interrupt
Controller
Fan Tach (12) 
PWM (4)
ADC
Thermal
USB 1.1 
&
USB 2.0
LPC Master,
JTAG Master, 
& SPI FLash
UART (3)
GPIO
KCS
BT &
Mailboxes
System
Wakeup
Control
LPC
Interface
Graphics 
Controller
BMC & KVMS Subsystem
BMC & KVMS Subsystem
 Graphics Subsystem
RTC &
General Purpose
TImers (3)
UART
(3)
I2C
(6)
Ethernet 
MAC with
RMII (2)
Crypto 
Accelerator
DDR-II
16-bit
Memory 
Controller
LPC to SPI
Flash Bridge
Watchdog
Timer
Real Time Clock 
Interface
(external RTC)
LPC
Interface
To Host
Video
Output
PCIe x1
Interface
DDR-II
(up to 
667MHz)
JTAG
Master
Code
Memory
USB 
to Host
Integrated BMC Block Diagram
 
Figure 7. Integrated BMC Hardware 
2.4.6.1 
Integrated BMC Embedded LAN Channel 
The Integrated BMC hardware includes two dedicated 10/100 network interfaces.  
Interface 1: This interface is available from either of the available NIC ports in system that 
can be shared with the host. Only one NIC may be enabled for management traffic at any 
time. To change the NIC enabled for management traffic, please use the “Write LAN 
Channel Port” OEM IPMI command. The default active interface is port 1 (NIC1). 
Interface 2: This interface is available from the optional RMM3 Lite-V module which is a 
dedicated management NIC that is not shared with the host. 
For these channels, support can be enabled for IPMI-over-LAN and DHCP. 
For security reasons, embedded LAN channels have the following default settings: 
ƒ
 
IP Address: Static 
ƒ
 All users disabled 
 
2.4.6.2 
Optional RMM3 Lite-V module 
RMM3 Lite-V module serves two purposes: 
    Give the customer the option to add a dedicated management 100 Mbit LAN 
interface to the product.  
    Provide additional flash space, enabling the Advanced Management functions to 
support WS-MAN and CIMON.