Cypress Semiconductor Cy8CKIT-050 Cy8CKIT-050B ユーザーズマニュアル

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Cy8CKIT-050B
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CY8CKIT-050 PSoC® 5LP Development Kit Guide, Doc. # 001-65816 Rev. *E
Hardware
If you intend to use the regulator power supply from the board to power the external modules, both
the P-MOS Q4 and Q5 will always be on, allowing the flow of current with a maximum of 22 mV drop
across the circuit when the current consumed by the external module is 150 mA.
Note The working of protection circuit on the 3.3-V line and 5-V line is as described above. For the
purpose of explanation, the annotation of 3.3-V protection circuitry (
) is used.
4.2.7
PSoC 5LP Development Kit Expansion Ports
The PSoC 5LP Development Kit has two expansion ports, port D and port E, each with their own
unique features.
4.2.7.1
Port D
This is the miscellaneous port designed to handle CapSense-based application boards and digital
application boards. The signal routing to this port adheres to the stringent requirements needed to
provide good performance CapSense. This port can also be used for other functions and expansion
board kits (EBKs). 
This port is not designed for precision analog performance. The pins on the port are functionally
compatible to port B of the PSoC Development Kit. So any project made to function on port B of the
PSoC Development Kit can be easily ported over to port D on this board. A caveat to this is that
there is no opamp available on this port; therefore, opamp-based designs are not recommended for
use on this port. 
The following figure shows the pin mapping for the port.